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([82.78.167.119]) by smtp.gmail.com with ESMTPSA id i11-20020a170906264b00b0099bd5d28dc4sm7186394ejc.195.2023.11.15.06.28.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Nov 2023 06:28:35 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH v2 0/9] irqchip/renesas-rzg2l: add support for RZ/G3S SoC Date: Wed, 15 Nov 2023 16:27:40 +0200 Message-Id: <20231115142749.853106-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Hi, Series adds support for IA55 available on RZ/G3S SoC. Patches are split as follows: - 1/9 updates documentation - 2/9 adds IA55 clock - 3-5/9 minor cleanups to align with the suggestions at [1] and coding style recommendations - 6/9 implement restriction described in HW manual for ISCR register - 7/9 add a macro to retrieve TITSR base address based on it's index - 8/9 add suspend to RAM support - 9/9 adds IA55 device tree node Thank you, Claudiu Beznea [1] https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#struct-declarations-and-initializers Changes in v2: - collected Conor's tag - updated commit description according to code review comments - added patches 4, 5 according to review recommendations - updated patch 7/9 to retrieve only TITSR base address; dropped the rest of the changes for the moment - in patch 8/9 use local variable in suspend/resume functions for controller's base address, indent initialized structures members to tabs, updated private driver data structure name - patch 3/7 from v1 was replaced by patch 7/9 in v2 - patch 5/7 from v1 was renamed "Add support for suspend to RAM" - cleanup patches were kept at the beginning of the series and features at the end Claudiu Beznea (9): dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S clk: renesas: r9a08g045: Add IA55 pclk and its reset irqchip/renesas-rzg2l: Use tabs instead of spaces irqchip/renesas-rzg2l: Align struct member names to tabs irqchip/renesas-rzg2l: Document structure members irqchip/renesas-rzg2l: Implement restriction when writing ISCR register irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register index irqchip/renesas-rzg2l: Add support for suspend to RAM arm64: dts: renesas: r9108g045: Add IA55 interrupt controller node .../renesas,rzg2l-irqc.yaml | 5 +- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 68 +++++++++++ drivers/clk/renesas/r9a08g045-cpg.c | 3 + drivers/irqchip/irq-renesas-rzg2l.c | 110 +++++++++++++----- 4 files changed, 156 insertions(+), 30 deletions(-)