From patchwork Tue Feb 27 23:25:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 13574579 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5205D58200; Tue, 27 Feb 2024 23:26:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709076363; cv=none; b=M+r5NZnDC304gH8yyuzwrfpJltmaDoAAS1nAEcG2Cvj1LwaNqUPFGvkNO+38FkWTMyrn9/baSr0ByPMCYWMZPU7nBy8Qkg/V1Z6mcRCsVf2M6rchffXVGNoWbsOf6InuOG7QvEVVqF3efiZNJvQteA8c+yOmumbE5rnkj584N5k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709076363; c=relaxed/simple; bh=Tp8rWEr1rnHxEgpzoTs6Z3OgfjHycVn0XPEyGG/4U+Y=; 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do echo -n "$i: ";cat /sys/devices/ soc0/$i; done machine: Renesas EVK based on r9a09g057h44 family: RZ/V2H soc_id: r9a09g057 revision: 0 ~ # ~ # cat /proc/cpuinfo processor : 0 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 1 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 2 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 3 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 ~ # ~ # ------------------ Cheers, Prabhakar Lad Prabhakar (4): dt-bindings: soc: renesas: Document Renesas RZ/V2H(P) SoC variants dt-bindings: arm: renesas: Document Renesas RZ/V2H(P) System Controller soc: renesas: Add identification support for RZ/V2H SoC arm64: defconfig: Enable R9A09G057 SoC .../soc/renesas/renesas,r9a09g057-sys.yaml | 51 +++++++++++++++++++ .../bindings/soc/renesas/renesas.yaml | 8 +++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 20 +++++++- 5 files changed, 84 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml