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[v3,0/2] Renesas RZ/G2L IRQ chip driver enhancements

Message ID 20240318085041.3150-1-biju.das.jz@bp.renesas.com (mailing list archive)
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Series Renesas RZ/G2L IRQ chip driver enhancements | expand

Message

Biju Das March 18, 2024, 8:50 a.m. UTC
As per the hardware team, TINT enable and TINT source should not be set
together as it will lead to a hardware race that result in spurious IRQ.
Hence avoid setting both in enable()/disable() instead set/clear TIEN on
enable()/disable(). After this the code can be simplfied by sharing the
common code between enable()/disable() by a helper function
rzg2l_tint_irq_endisable().

v2->v3:
 * Dropped patch#1-#4 as it is accepted
 * Split the patch#5 into 2. first one avoids setting TIEN and TINT source
   together and later patch simplifies the code.
 * Updated commit header and description for patch#1.
 * Restored the patch#2 from series#1.
v1->v2:
 * Dropped pinctrl dependency as it hits next.
 * Updated commit header and description for patch#1.
 * Extended the flushing of posted write to IRQ interrupt as well.
 * Updated patch#2 commit description *_tint_eoi()->*_clear_tint_int().
 * Added Rb tag from Geert for patch#2.
 * Added Patch#3 is for replacing rzg2l_irq_eoi()->rzg2l_clear_irq_int().
 * Updated commit header and description for patch#4.
 * Extended spurious IRQ fix for TINT to IRQ as well.
 * Updated the logic for rzg2l_disable_tint_and_set_tint_source() and
   rzg2l_tint_set_edge().
 * Merged patch#4 and #5 and updated commit description.

Biju Das (2):
  irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same
    time
  irqchip/renesas-rzg2l: Simplify rzg2l_irqc_irq_{en,dis}able()

 drivers/irqchip/irq-renesas-rzg2l.c | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)