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Wed, 23 Oct 2024 11:46:57 -0400 (EDT) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Geert Uytterhoeven , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board Date: Wed, 23 Oct 2024 17:46:41 +0200 Message-ID: <20241023154643.4025941-1-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.46.2 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Geert, This small series wires up the Marvell 88Q2110 PHYs found on the Falcon Ethernet breakout board. With this applied all five PHYs are probed correctly. mv88q2110 e6810000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6810000.ethernet-ffffffff:07, irq=POLL) mv88q2110 e6820000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6820000.ethernet-ffffffff:07, irq=POLL) mv88q2110 e6830000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6830000.ethernet-ffffffff:07, irq=POLL) mv88q2110 e6840000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6840000.ethernet-ffffffff:07, irq=POLL) mv88q2110 e6850000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6850000.ethernet-ffffffff:07, irq=POLL) The wire-up works fine with unbind/bind cycles of the device and the PHY can properly be probed again. The primary issue we had with this in the past was due to an incorrect PHY address. After studying the schematics (v100) I found the PHYs address pins are wired differently on Falcon compared to other Gen4 boards. On Falcon they are pulled-down, while on other Gen4 boards they are left unconnected and subjected to the PHYs internal pull-ups. This gives the PHY an address where the lower 3 bits of the address is inverted for Falcon. Patch 1/2 is a simple preparation patch removing properties that should not be set in the base SoC include and will produce warnings once the mdio node is added. Patch 2/2 wires up the PHYs. Most likely the change in 1/2 should be applied to AVB0 also, but pending our discussion in a different patch about where to place the reset-gpio property for mdio nodes that don't strictly need it I left AVB0 as is. See individual patches for changelog. Niklas Söderlund (2): arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board .../dts/renesas/r8a779a0-falcon-ethernet.dtsi | 242 ++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 10 - 2 files changed, 242 insertions(+), 10 deletions(-)