[v4,00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions

Message

Kuninori Morimoto July 1, 2022, 1:35 a.m. UTC

Hi Geert

These are v4 of V4H (r8a779g0) pinctrl patches.
These are based on renesas-pinctrl/renesas-pinctrl-for-v5.20.

As I have mentioned before, I want to keep original code as much as
possible to avoid unexpected bug. [03/23][04/23][05/23] are for it.
[04/23] or later are incremental patch.

These are based on Rev.0.51 datasheet, but we already know that it has
many unclear point, mismuch, incoherence, etc.
I have asked it to HW/Doc team and it will be fixed on new version datasheet,
but we still don't have it yet. This patches including the information as much as
possible. We need to update the code when new version datasheet was coming.
But, these are not direct issue for current existing board, it should be OK for now.

You have mentioned that you are thinking MODSEL5/6 setting is needed for MII case too,
and I have asked it to HW/Doc team. It seems MII don't need the MODSEL settings,
but their comment was not very clear for me. Because they are very busy, it is difficult
to have frequent communication with them.
I think current code is OK, but we need to double check it when new datasheet was coming.

Because it is related to DT, some IP which suffix might be updated on new datasheet
has /* suffix might be updated */ at SH_PFC_PIN_GROUP()

v3 -> v4

	- add Geert's Reviewed-by if it already got
	- uses original value for MODSEL8 on [03/23], and will be fixuped on [05/23].
	- suffix fixup IRQ4 -> IRQ4_A
	- suffix fixup on comment "xx#" -> "xx_N"
	- suffix fixup xxx_A_N -> xxx_N_A
	- remove unused IPxSRx/MOD_SEL lines
	- remove POC2, not comment-out
	- FlaxRay -> FlexRay
	- merge same pin groups
	- fixup comment MDSEL4/5 -> MODSEL4/5
	- add /* suffix might be updated */ on some IP. We need check it when
	  new datasheet was coming. [20/23] doesn't have it, because maybe
	  it doesn't have suffix issue.

v2 -> v3
	- for [03/21]
		- remove "core.h"
		- drop DRV1 from CANFD7 comment
		- rename pinmux_ops to r8a779g0_pfc_ops
		- fixup comment XR_TXENA_N -> FXR_TXENA_N
		- fixup comment RPC_RESET -> RPC_RESET_N
		- fixup TPU0TO1/TPU0TO0 order at PUEN2
	- for [04/21]
		- Missing blank line.
		- sort modules alphabetically
		- fixup comment RX,TX -> RX1, TX1
		- fixup comment MSIOF1_xxx -> MSIOF2_xxx
		- fixup comment RTS3#/CTS3# -> RTS3_N/CTS3_N
		- fixup comment RTS1#/CTS1# -> RTS1_N/CTS1_N
	- add missing pin settings.

v1 -> v2

	- add r8a779g0 on renesas,pfc Document at [1/4]
	- use CFG_13 on CFG_14 [2/4]
	- tidyup WARNINGs [3/4]
	  - tidyup tab and/or white space
	  - care reserve bit/fields	  
	  - fixup settings miss
	- tidyup tab and/or white space [4/4]

Kuninori Morimoto (21):
  dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support
  pinctrl: renesas: Add PORT_GP_CFG_13 macros
  pinctrl: renesas: r8a779g0: fixup MODSEL8
  pinctrl: renesas: r8a779g0: remove not used NOGP definitions
  pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions
  pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions
  pinctrl: renesas: r8a779g0: tidyup ioctrl_regs
  pinctrl: renesas: r8a779g0: tidyup POC1 voltage
  pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X
  pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B
  pinctrl: renesas: r8a779g0: add missing HSCIF3_A
  pinctrl: renesas: r8a779g0: add missing HSCIF1_X
  pinctrl: renesas: r8a779g0: add missing SCIF3
  pinctrl: renesas: r8a779g0: add missing SCIF1_X
  pinctrl: renesas: r8a779g0: add missing CANFD5_B
  pinctrl: renesas: r8a779g0: add missing TPU0TOx_A
  pinctrl: renesas: r8a779g0: add missing FlexRay
  pinctrl: renesas: r8a779g0: add missing PWM
  pinctrl: renesas: r8a779g0: add missing ERROROUTC_A
  pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0
  pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx

LUU HOAI (1):
  pinctrl: renesas: Initial R8A779G0 (V4H) PFC support

Phong Hoang (1):
  pinctrl: renesas: r8a779g0: Add pins, groups and functions

 .../bindings/pinctrl/renesas,pfc.yaml         |    1 +
 drivers/pinctrl/renesas/Kconfig               |    5 +
 drivers/pinctrl/renesas/Makefile              |    1 +
 drivers/pinctrl/renesas/core.c                |    6 +
 drivers/pinctrl/renesas/pfc-r8a779g0.c        | 4259 +++++++++++++++++
 drivers/pinctrl/renesas/sh_pfc.h              |    9 +-
 6 files changed, 4279 insertions(+), 2 deletions(-)
 create mode 100644 drivers/pinctrl/renesas/pfc-r8a779g0.c

Comments

Geert Uytterhoeven July 4, 2022, 3:41 p.m. UTC | #1

On Fri, Jul 1, 2022 at 3:36 AM Kuninori Morimoto
<[e-mail]> wrote:
> From: LUU HOAI <[e-mail]>
>
> This patch adds initial pinctrl support for the R8A779G0 (V4H) SoC,
> including bias, drive strength and voltage control.
>
> [This patch was created based on Rev.0.51 datasheet]
> [Morimoto merged Kihara-san's MODSEL8 fixup patch,
>  cleanuped white space, care reserved bit on each configs,
>  fixup comments, etc]
> Signed-off-by: LUU HOAI <[e-mail]>
> Signed-off-by: Takeshi Kihara <[e-mail]>
> Signed-off-by: Kuninori Morimoto <[e-mail]>

Reviewed-by: Geert Uytterhoeven <[e-mail]>
i.e. will queue in renesas-pinctrl-for-v5.20.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [e-mail]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds