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[0/9] clk: renesas: add 922 ADG bit

Message ID 87r0onprph.wl-kuninori.morimoto.gx@renesas.com (mailing list archive)
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Series clk: renesas: add 922 ADG bit | expand

Message

Kuninori Morimoto July 31, 2023, 11:49 p.m. UTC
Hi Geert

Renesas Sound is possible to use internal clock
(we have never use it before).
In such case, we need to enable both S0D4/ZA2 and ADG on Gen3,
and we are missing later bit.
This patch-set add missing 922 ADG bit on each Gen3 clock driver.
I will post DT patch to use it if these were accepted.

Kuninori Morimoto (9):
  clk: renesas: r8a7795: add 922 ADG
  clk: renesas: r8a7796: add 922 ADG
  clk: renesas: r8a774a1: add 922 ADG
  clk: renesas: r8a774b1: add 922 ADG
  clk: renesas: r8a774c0: add 922 ADG
  clk: renesas: r8a774e1: add 922 ADG
  clk: renesas: r8a77965: add 922 ADG
  clk: renesas: r8a77990: add 922 ADG
  clk: renesas: r8a77995: add 922 ADG

 drivers/clk/renesas/r8a774a1-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a774b1-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a774c0-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a774e1-cpg-mssr.c | 2 +-
 drivers/clk/renesas/r8a7795-cpg-mssr.c  | 1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c  | 1 +
 drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 +
 drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 +
 9 files changed, 9 insertions(+), 1 deletion(-)