| Message ID | 1454062646-4826-3-git-send-email-geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 33ef9688ae45d19bf11c75a7c403a4f20804720d |
| Delegated to: | Simon Horman |
| Headers | show |
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index a52b359e2ae24a30..21e3b9dda2dabf5e 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -126,11 +126,19 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif0_pins: serial0 { renesas,groups = "scif0_data_a", "scif0_ctrl"; renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + mmc_pins: mmc { renesas,groups = "mmc_data8", "mmc_ctrl"; renesas,function = "mmc"; @@ -217,3 +225,8 @@ status = "okay"; }; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +};
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- Based on schematics, tested with remote access. v4: - Change one-line summary prefix to match current arm-soc practices, - Move scif_clk next to scif0, for consistency with other boards, v3: - New. --- arch/arm/boot/dts/r8a7778-bockw.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)