From patchwork Fri Jan 29 10:17:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 8161931 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 46F61BEEE5 for ; Fri, 29 Jan 2016 10:17:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 17BAA2037E for ; Fri, 29 Jan 2016 10:17:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 617A020374 for ; Fri, 29 Jan 2016 10:17:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753947AbcA2KRe (ORCPT ); Fri, 29 Jan 2016 05:17:34 -0500 Received: from andre.telenet-ops.be ([195.130.132.53]:38407 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753619AbcA2KR3 (ORCPT ); Fri, 29 Jan 2016 05:17:29 -0500 Received: from ayla.of.borg ([84.195.106.123]) by andre.telenet-ops.be with bizsmtp id BmHS1s0132fm56U01mHSns; Fri, 29 Jan 2016 11:17:28 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1aP67K-0001Ip-JE; Fri, 29 Jan 2016 11:17:26 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1aP67L-0001HK-83; Fri, 29 Jan 2016 11:17:27 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 7/9] ARM: dts: porter: Enable SCIF_CLK frequency and pins Date: Fri, 29 Jan 2016 11:17:24 +0100 Message-Id: <1454062646-4826-8-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454062646-4826-1-git-send-email-geert+renesas@glider.be> References: <1454062646-4826-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven --- Untested, based on hardware manual. Note that U-Boot doesn't use SCIF_CLK on porter, like salvator-x, but unlike all other supported R-Car Gen2 boards. v4: - Change one-line summary prefix to match current arm-soc practices, v3: - New. --- arch/arm/boot/dts/r8a7791-porter.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 5015eaa0ae50039e..ed1f6f884e2b2168 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -143,11 +143,19 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif0_pins: serial0 { renesas,groups = "scif0_data_d"; renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -221,6 +229,11 @@ status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + ðer { pinctrl-0 = <ðer_pins &phy1_pins>; pinctrl-names = "default";