| Message ID | 1455242450-24493-7-git-send-email-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | RFC |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Laurent, On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> wrote: > The FCPs handle the interface between various IP cores and memory. Add > the instances related to the VSP2s. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++ > 1 file changed, 63 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > index b5e46e4ff72a..f62d6fa28acc 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -960,5 +960,68 @@ > #dma-cells = <1>; > dma-channels = <2>; > }; > + > + fcpvb1: fcp@fe92f000 { > + compatible = "renesas,fcpv"; > + reg = <0 0xfe92f000 0 0x200>; > + clocks = <&cpg CPG_MOD 606>; > + power-domains = <&cpg>; > + }; The FCP_V modules are located in the A3VP Power Area. But adding this information to DT depends on the SYSC PM Domain driver. I'll try to post my WIP PM Domain patchset for R-Car ASAP... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thank you for the review. On Monday 15 February 2016 10:45:39 Geert Uytterhoeven wrote: > On Fri, Feb 12, 2016 at 3:00 AM, Laurent Pinchart wrote: > > The FCPs handle the interface between various IP cores and memory. Add > > the instances related to the VSP2s. > > > > Signed-off-by: Laurent Pinchart > > <laurent.pinchart+renesas@ideasonboard.com> > > --- > > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++ > > 1 file changed, 63 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index > > b5e46e4ff72a..f62d6fa28acc 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > @@ -960,5 +960,68 @@ > > #dma-cells = <1>; > > dma-channels = <2>; > > }; > > > > + > > + fcpvb1: fcp@fe92f000 { > > + compatible = "renesas,fcpv"; > > + reg = <0 0xfe92f000 0 0x200>; > > + clocks = <&cpg CPG_MOD 606>; > > + power-domains = <&cpg>; > > + }; > > The FCP_V modules are located in the A3VP Power Area. But adding this > information to DT depends on the SYSC PM Domain driver. > > I'll try to post my WIP PM Domain patchset for R-Car ASAP... As soon as you add the A3VP power domain to DT I'll make sure to make use of it :-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index b5e46e4ff72a..f62d6fa28acc 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -960,5 +960,68 @@ #dma-cells = <1>; dma-channels = <2>; }; + + fcpvb1: fcp@fe92f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe92f000 0 0x200>; + clocks = <&cpg CPG_MOD 606>; + power-domains = <&cpg>; + }; + + fcpvb0: fcp@fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&cpg>; + }; + + fcpvi0: fcp@fe9af000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9af000 0 0x200>; + clocks = <&cpg CPG_MOD 611>; + power-domains = <&cpg>; + }; + + fcpvi1: fcp@fe9bf000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9bf000 0 0x200>; + clocks = <&cpg CPG_MOD 610>; + power-domains = <&cpg>; + }; + + fcpvi2: fcp@fe9cf000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9cf000 0 0x200>; + clocks = <&cpg CPG_MOD 609>; + power-domains = <&cpg>; + }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&cpg>; + }; + + fcpvd1: fcp@fea2f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea2f000 0 0x200>; + clocks = <&cpg CPG_MOD 602>; + power-domains = <&cpg>; + }; + + fcpvd2: fcp@fea37000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea37000 0 0x200>; + clocks = <&cpg CPG_MOD 601>; + power-domains = <&cpg>; + }; + + fcpvd3: fcp@fea3f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea3f000 0 0x200>; + clocks = <&cpg CPG_MOD 600>; + power-domains = <&cpg>; + }; }; };
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+)