From patchwork Mon Feb 15 21:17:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 8319461 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0AD409F6E4 for ; Mon, 15 Feb 2016 21:17:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4EE1A202E5 for ; Mon, 15 Feb 2016 21:17:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 87BB620398 for ; Mon, 15 Feb 2016 21:17:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752620AbcBOVR0 (ORCPT ); Mon, 15 Feb 2016 16:17:26 -0500 Received: from xavier.telenet-ops.be ([195.130.132.52]:58312 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751153AbcBOVRM (ORCPT ); Mon, 15 Feb 2016 16:17:12 -0500 Received: from ayla.of.borg ([84.195.106.123]) by xavier.telenet-ops.be with bizsmtp id JlH81s00V2fm56U01lH8Zw; Mon, 15 Feb 2016 22:17:08 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1aVQW4-000830-Jz; Mon, 15 Feb 2016 22:17:08 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1aVQW5-0004xm-Bc; Mon, 15 Feb 2016 22:17:09 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm , Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/RFC v2 11/11] arm64: dts: r8a7795: Add SYSC PM domains Date: Mon, 15 Feb 2016 22:17:00 +0100 Message-Id: <1455571020-18968-12-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455571020-18968-1-git-send-email-geert+renesas@glider.be> References: <1455571020-18968-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2 caches/SCUs to their respective PM domains. Signed-off-by: Geert Uytterhoeven --- The SH core was dropped in datasheet rev. 0.5E? v2: - New. --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 142 +++++++++++++++++++++++++++++++ 1 file changed, 142 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index c572527afec3403a..69f400e0d478b285 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -39,6 +39,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + power-domains = <&pd_ca57_cpu0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -47,6 +48,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; + power-domains = <&pd_ca57_cpu1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -54,6 +56,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; device_type = "cpu"; + power-domains = <&pd_ca57_cpu2>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -61,6 +64,7 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; device_type = "cpu"; + power-domains = <&pd_ca57_cpu3>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -68,12 +72,14 @@ L2_CA57: cache-controller@0 { compatible = "cache"; + power-domains = <&pd_ca57_scu>; cache-unified; cache-level = <2>; }; L2_CA53: cache-controller@1 { compatible = "cache"; + power-domains = <&pd_ca53_scu>; cache-unified; cache-level = <2>; }; @@ -968,5 +974,141 @@ #dma-cells = <1>; dma-channels = <2>; }; + + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7795-sysc", + "renesas,rcar-gen3-sysc"; + reg = <0 0xe6180000 0 0x0400>; + + pm-domains { + #address-cells = <2>; + #size-cells = <0>; + + pd_ca57_scu: ca57_scu@12 { + reg = <12 0x1c0>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_ca57_cpu0: ca57_cpu@0 { + reg = <0 0x80>; + #power-domain-cells = <0>; + }; + + pd_ca57_cpu1: ca57_cpu@1 { + reg = <1 0x81>; + #power-domain-cells = <0>; + }; + + pd_ca57_cpu2: ca57_cpu@2 { + reg = <2 0x82>; + #power-domain-cells = <0>; + }; + + pd_ca57_cpu3: ca57_cpu@3 { + reg = <3 0x83>; + #power-domain-cells = <0>; + }; + }; + + pd_ca53_scu: ca53_scu@21 { + reg = <21 0x140>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_ca53_cpu0: ca53_cpu@5 { + reg = <5 0x200>; + #power-domain-cells = <0>; + }; + + pd_ca53_cpu1: ca53_cpu@6 { + reg = <6 0x201>; + #power-domain-cells = <0>; + }; + + pd_ca53_cpu2: ca53_cpu@7 { + reg = <7 0x202>; + #power-domain-cells = <0>; + }; + + pd_ca53_cpu3: ca53_cpu@8 { + reg = <8 0x203>; + #power-domain-cells = <0>; + }; + }; + + pd_a3vp: a3vp@9 { + reg = <9 0x340>; + #power-domain-cells = <0>; + }; + + + pd_cr7: cr7@13 { + reg = <13 0x240>; + #power-domain-cells = <0>; + }; + + pd_a3vc: a3vc@14 { + reg = <14 0x380>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_a2vc0: a2vc@25 { + reg = <25 0x3c0>; + #power-domain-cells = <0>; + }; + + pd_a2vc1: a2vc@26 { + reg = <26 0x3c1>; + #power-domain-cells = <0>; + }; + }; + + pd_a3sh: a3sh@16 { + reg = <16 0xc0>; + #power-domain-cells = <0>; + }; + + pd_3dg_a: 3dg@17 { + reg = <17 0x100>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_3dg_b: 3dg@18 { + reg = <18 0x101>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_3dg_c: 3dg@19 { + reg = <19 0x102>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_3dg_d: 3dg@20 { + reg = <20 0x103>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_3dg_e: 3dg@22 { + reg = <22 0x104>; + #power-domain-cells = <0>; + }; + }; + }; + }; + }; + + pd_a3ir: a3ir@24 { + reg = <24 0x180>; + #power-domain-cells = <0>; + }; + }; + }; }; };