diff mbox

arm64: dts: r8a7795: Add CAN support

Message ID 1456755759-51288-1-git-send-email-ramesh.shanmugasundaram@bp.renesas.com (mailing list archive)
State Accepted
Commit 308b7e4ba62e2ab60efcaf426cc219d591f0cd28
Delegated to: Simon Horman
Headers show

Commit Message

Ramesh Shanmugasundaram Feb. 29, 2016, 2:22 p.m. UTC
Adds CAN controller nodes for r8a7795.

Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
User Manual v0.5E is incorrect. The corrected base addresses are:

CAN Channel 0 - 0xe6c30000
CAN Channel 1 - 0xe6c38000

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
---
Hi All,

   This patch is based on linux-next (tag:next-20160225) with following patch
   applied on top

   [PATCH v2] arm64: dts: r8a7795: Add CAN external clock support

   The respective CAN subsystem changes are submitted separately here (http://marc.info/?l=linux-can&m=145674974416086&w=2)

 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

Comments

Marc Kleine-Budde March 1, 2016, 8:12 a.m. UTC | #1
On 02/29/2016 03:22 PM, Ramesh Shanmugasundaram wrote:
> Adds CAN controller nodes for r8a7795.
> 
> Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
> User Manual v0.5E is incorrect. The corrected base addresses are:
> 
> CAN Channel 0 - 0xe6c30000
> CAN Channel 1 - 0xe6c38000
> 
> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
> ---
> Hi All,
> 
>    This patch is based on linux-next (tag:next-20160225) with following patch
>    applied on top

Who should take this patch?

Marc
Ramesh Shanmugasundaram March 1, 2016, 8:20 a.m. UTC | #2
Hi Marc,

> On 02/29/2016 03:22 PM, Ramesh Shanmugasundaram wrote:

> > Adds CAN controller nodes for r8a7795.

> >

> > Note: CAN channel register base address mentioned in R-Car Gen3

> > Hardware User Manual v0.5E is incorrect. The corrected base addresses

> are:

> >

> > CAN Channel 0 - 0xe6c30000

> > CAN Channel 1 - 0xe6c38000

> >

> > Signed-off-by: Ramesh Shanmugasundaram

> > <ramesh.shanmugasundaram@bp.renesas.com>

> > ---

> > Hi All,

> >

> >    This patch is based on linux-next (tag:next-20160225) with following

> patch

> >    applied on top

> 

> Who should take this patch?


If acked, I think it is Simon (who consolidates all Renesas ARM64 DT changes and make one pull request). Copied Geert too.

Thanks,
Ramesh
Simon Horman March 2, 2016, 12:28 a.m. UTC | #3
On Tue, Mar 01, 2016 at 08:20:25AM +0000, Ramesh Shanmugasundaram wrote:
> Hi Marc,
> 
> > On 02/29/2016 03:22 PM, Ramesh Shanmugasundaram wrote:
> > > Adds CAN controller nodes for r8a7795.
> > >
> > > Note: CAN channel register base address mentioned in R-Car Gen3
> > > Hardware User Manual v0.5E is incorrect. The corrected base addresses
> > are:
> > >
> > > CAN Channel 0 - 0xe6c30000
> > > CAN Channel 1 - 0xe6c38000
> > >
> > > Signed-off-by: Ramesh Shanmugasundaram
> > > <ramesh.shanmugasundaram@bp.renesas.com>
> > > ---
> > > Hi All,
> > >
> > >    This patch is based on linux-next (tag:next-20160225) with following
> > patch
> > >    applied on top
> > 
> > Who should take this patch?
> 
> If acked, I think it is Simon (who consolidates all Renesas ARM64 DT changes and make one pull request). Copied Geert too.

I believe it is appropriate for me to take this patch the renesas tree.
I would be glad of any review and Acks, though I don't think an Ack
from the driver maintainer is strictly necessary.

Assuming there are no objections I plan to queue up this patch
once the bindings been queued up.
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 4049182..a88f8d8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -523,6 +523,36 @@ 
 			#size-cells = <0>;
 		};
 
+		can0: can@e6c30000 {
+			compatible = "renesas,can-r8a7795",
+				     "renesas,rcar-gen3-can";
+			reg = <0 0xe6c30000 0 0x1000>;
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 916>,
+			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		can1: can@e6c38000 {
+			compatible = "renesas,can-r8a7795",
+				     "renesas,rcar-gen3-can";
+			reg = <0 0xe6c38000 0 0x1000>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 915>,
+			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		hscif0: serial@e6540000 {
 			compatible = "renesas,hscif-r8a7795",
 				     "renesas,rcar-gen3-hscif",