From patchwork Mon Apr 25 12:24:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=C3=BCrg_Billeter?= X-Patchwork-Id: 8927281 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C0B569F39D for ; Mon, 25 Apr 2016 12:32:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2015B20204 for ; Mon, 25 Apr 2016 12:32:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59781201F2 for ; Mon, 25 Apr 2016 12:32:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932162AbcDYMcT (ORCPT ); Mon, 25 Apr 2016 08:32:19 -0400 Received: from nov-007-i611.relay.mailchannels.net ([46.232.183.165]:27147 "EHLO nov-007-i611.relay.mailchannels.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754557AbcDYMcQ convert rfc822-to-8bit (ORCPT ); Mon, 25 Apr 2016 08:32:16 -0400 X-Greylist: delayed 421 seconds by postgrey-1.27 at vger.kernel.org; Mon, 25 Apr 2016 08:32:14 EDT X-Sender-Id: novatrend|x-authuser|juerg@bitron.ch Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id EF14F2EC001D; Mon, 25 Apr 2016 12:25:08 +0000 (UTC) Received: from srv17.tophost.ch (swiss-ingress-1.ch.mailchannels.com [46.232.183.5]) by relay.mailchannels.net (Postfix) with ESMTPA id 331DB2EC0020; Mon, 25 Apr 2016 12:25:05 +0000 (UTC) X-Sender-Id: novatrend|x-authuser|juerg@bitron.ch Received: from srv17.tophost.ch (srv17.tophost.ch [193.33.128.141]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.6.11); Mon, 25 Apr 2016 12:25:08 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: novatrend|x-authuser|juerg@bitron.ch X-MailChannels-Auth-Id: novatrend X-MC-Loop-Signature: 1461587108530:3706652531 X-MC-Ingress-Time: 1461587108529 Received: from 84-75-82-190.dclient.hispeed.ch ([84.75.82.190]:35652 helo=jivy.bitron.ch) by srv17.tophost.ch with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_1) (envelope-from ) id 1aufZU-001t9K-Rf; Mon, 25 Apr 2016 14:25:00 +0200 Message-ID: <1461587081.28870.2.camel@bitron.ch> Subject: sh-sci regression without scif_clk in 4.6-rc5 From: =?ISO-8859-1?Q?J=FCrg?= Billeter To: geert+renesas@glider.be Cc: linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org Date: Mon, 25 Apr 2016 14:24:41 +0200 X-Mailer: Evolution 3.20.1 Mime-Version: 1.0 X-AuthUser: juerg@bitron.ch Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Geert, testing 4.6-rc5 on a custom R-Car H3 board, I noticed that the Linux console attached to SCIF2 no longer works (it works on 4.5). earlycon works fine, though. Unlike Salvator-X, this H3 board does not use an external SCIF clock and thus, scif_clk is not enabled in the board device tree. The first "bad" commit is commit 3e5dd6f6e690048d0fd1c913397506648724474e Author: Geert Uytterhoeven Date:   Fri Feb 26 16:54:31 2016 +0100     clk: Ignore disabled DT clock providers As far as I can tell, the issue is that, with the above commit, devm_clk_get() returns -EPROBE_DEFER for disabled clocks and the sh-sci driver aborts probing with -EPROBE_DEFER even though scif_clk is optional. I can work around this issue with the patch below but I'm not sure about the correct fix. Intuitively, I would expect devm_clk_get() to return -ENOENT instead of -EPROBE_DEFER for disabled clocks but I don't know whether this can be changed in the common clock framework without risking issues in other places. What do you think is the best solution to this issue? Regards, Jürg diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 8e966d9..0916159 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2462,7 +2462,7 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)           for (i = 0; i < SCI_NUM_CLKS; i++) {                 clk = devm_clk_get(dev, clk_names[i]); -               if (PTR_ERR(clk) == -EPROBE_DEFER) +               if (PTR_ERR(clk) == -EPROBE_DEFER && i != SCI_SCIF_CLK)                         return -EPROBE_DEFER;                   if (IS_ERR(clk) && i == SCI_FCK) {