From patchwork Thu Oct 13 09:31:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramesh Shanmugasundaram X-Patchwork-Id: 9374619 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C932760779 for ; Thu, 13 Oct 2016 09:40:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B909B29F58 for ; Thu, 13 Oct 2016 09:40:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AAEE629F5B; Thu, 13 Oct 2016 09:40:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 412E729F58 for ; Thu, 13 Oct 2016 09:40:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751972AbcJMJkJ (ORCPT ); Thu, 13 Oct 2016 05:40:09 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:58360 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751971AbcJMJkJ (ORCPT ); Thu, 13 Oct 2016 05:40:09 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie2.idc.renesas.com with ESMTP; 13 Oct 2016 18:40:07 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id 3C3195D35D; Thu, 13 Oct 2016 18:40:07 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 1C08118070; Thu, 13 Oct 2016 18:40:07 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 0CC081806F; Thu, 13 Oct 2016 18:40:07 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac3.idc.renesas.com with ESMTP id UAA12506; Thu, 13 Oct 2016 18:40:07 +0900 X-IronPort-AV: E=Sophos;i="5.22,559,1449500400"; d="scan'208";a="222766958" Received: from unknown (HELO localhost.localdomain) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 13 Oct 2016 18:40:04 +0900 From: Ramesh Shanmugasundaram To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@codeaurora.org Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, chris.paterson2@renesas.com, Ramesh Shanmugasundaram Subject: [PATCH] clk: renesas: r8a7796: Add DRIF clock Date: Thu, 13 Oct 2016 10:31:48 +0100 Message-Id: <1476351108-54370-1-git-send-email-ramesh.shanmugasundaram@bp.renesas.com> X-Mailer: git-send-email 1.9.1 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds DRIF module clocks for r8a7796 SoC. Signed-off-by: Ramesh Shanmugasundaram Reviewed-by: Geert Uytterhoeven Acked-by: Stephen Boyd --- Hi Geert, All, This patch is based on renesas-drivers repo (tag:renesas-drivers-2016-10-04-v4.8) Thanks, Ramesh. --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index f0302fb..f2f56e1 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -128,6 +128,14 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("rwdt0", 402, R8A7796_CLK_R), DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1), + DEF_MOD("drif7", 508, R8A7796_CLK_S3D2), + DEF_MOD("drif6", 509, R8A7796_CLK_S3D2), + DEF_MOD("drif5", 510, R8A7796_CLK_S3D2), + DEF_MOD("drif4", 511, R8A7796_CLK_S3D2), + DEF_MOD("drif3", 512, R8A7796_CLK_S3D2), + DEF_MOD("drif2", 513, R8A7796_CLK_S3D2), + DEF_MOD("drif1", 514, R8A7796_CLK_S3D2), + DEF_MOD("drif0", 515, R8A7796_CLK_S3D2), DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1), DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1), DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),