From patchwork Fri Dec 9 12:36:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 9468105 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 42B59607D8 for ; Fri, 9 Dec 2016 12:36:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 363EB28624 for ; Fri, 9 Dec 2016 12:36:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B1EB28632; Fri, 9 Dec 2016 12:36:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D4B9C28624 for ; Fri, 9 Dec 2016 12:36:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933559AbcLIMgS (ORCPT ); Fri, 9 Dec 2016 07:36:18 -0500 Received: from mail-wj0-f195.google.com ([209.85.210.195]:33153 "EHLO mail-wj0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933553AbcLIMgR (ORCPT ); Fri, 9 Dec 2016 07:36:17 -0500 Received: by mail-wj0-f195.google.com with SMTP id kp2so2308537wjc.0; Fri, 09 Dec 2016 04:36:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z294NvMvFJoFmEtrByOBEB39zF0h10rx6gryii3BfP8=; b=Bvk6hg5dSP4mgc2Vus+b8lZWumuVQEWvPjZp8PjkinbJRZp8AmRfL8CYEYcnQ++F8B fPDiXg8kv2PRzKXvCzldv+5u1GhMkm6BIkqs7vRfTi/6N+3a/d1451NrmIruRplfPeBL gnlOr6AJWPtNZMpUZgaPB4dWsVqTyAw/4fbe1agkC24LtPr5Zc1z86sIm0ZaKj78761q 8Dsy9lOqjrPbA668aI3ymcROLDqPtLCcfkjbw8t72O6X2k2wt4kwE/+8pDcviyg+TYeq LR46JLmLPqNVDd3XoIC3nq8tWFtTODlXT1hAJB7F/CyKVbb9AYICS3vClDhgiDLvAE8L IUVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Z294NvMvFJoFmEtrByOBEB39zF0h10rx6gryii3BfP8=; b=kCOdJWw3gwq/oLoZWJVSrsyQd0Wsd9avIpn8pkYXLeHbKGFj2Keh4GgWVrsHYGimcK fW6OEbkoHe6MXnIJV97PRY2HxyoUFKkpLkYYb62GQ9RDMZLNl7UdRBskQ9ntcMW1v8L9 OqXPHQbwZUHL6a6jYTSsMTkMLe6qTBMQUT68XDdh92pggRIg7BNCkbePcmgvQgnAAZSz UUoZ98e/FEsZlZlIsfSsylLoHb4FxLcLk6SC9mrngPz8VsCAI9Mcsua7wX4ENygHR/hx 823vZsYqY/F8aK3eVnaH96e/ym2eE4dLX1S6dStn22Jl/NhlXNRJD0b/iu99AjQvSG0i K0dA== X-Gm-Message-State: AKaTC03VqEg/RPVu1b6nW6DiCGAlVz+x2g7+E3BOWYfWiYNpMAovsh5D/hkZzNO3bhMy/Q== X-Received: by 10.194.123.103 with SMTP id lz7mr78201112wjb.100.1481286976232; Fri, 09 Dec 2016 04:36:16 -0800 (PST) Received: from groucho.site (ipbcc17b88.dynamic.kabel-deutschland.de. [188.193.123.136]) by smtp.gmail.com with ESMTPSA id d10sm42068758wja.20.2016.12.09.04.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Dec 2016 04:36:15 -0800 (PST) From: Ulrich Hecht To: linux-renesas-soc@vger.kernel.org, wsa@the-dreams.de, geert@linux-m68k.org Cc: linux-serial@vger.kernel.org, magnus.damm@gmail.com, Ulrich Hecht Subject: [PATCH 1/7] serial: sh-sci: add FIFO trigger bits Date: Fri, 9 Dec 2016 13:36:05 +0100 Message-Id: <1481286971-16667-2-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1481286971-16667-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1481286971-16667-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Defines the bits controlling FIFO thresholds, adds the additional HSCIF registers to the register map. Signed-off-by: Ulrich Hecht Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/sh-sci.c | 2 ++ drivers/tty/serial/sh-sci.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 4b26252..385afbe 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -377,6 +377,8 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { [SCPDR] = sci_reg_invalid, [SCDL] = { 0x30, 16 }, [SCCKS] = { 0x34, 16 }, + [HSRTRGR] = { 0x54, 16 }, + [HSTTRGR] = { 0x58, 16 }, }, /* diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index ffa6d68..f51f919 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h @@ -29,6 +29,8 @@ enum { SCPDR, /* Serial Port Data Register */ SCDL, /* BRG Frequency Division Register */ SCCKS, /* BRG Clock Select Register */ + HSRTRGR, /* Receive FIFO Data Count Register */ + HSTTRGR, /* Transmit FIFO Data Count Register */ SCIx_NR_REGS, }; @@ -99,6 +101,10 @@ enum { #define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK)) /* SCFCR (FIFO Control Register) */ +#define SCFCR_RTRG1 BIT(7) /* Receive FIFO Data Count Trigger */ +#define SCFCR_RTRG0 BIT(6) +#define SCFCR_TTRG1 BIT(5) /* Transmit FIFO Data Count Trigger */ +#define SCFCR_TTRG0 BIT(4) #define SCFCR_MCE BIT(3) /* Modem Control Enable */ #define SCFCR_TFRST BIT(2) /* Transmit FIFO Data Register Reset */ #define SCFCR_RFRST BIT(1) /* Receive FIFO Data Register Reset */