From patchwork Thu Apr 27 14:37:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 9702951 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8CFFC6032C for ; Thu, 27 Apr 2017 14:37:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 766C728655 for ; Thu, 27 Apr 2017 14:37:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6ABF52865D; Thu, 27 Apr 2017 14:37:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EE0328655 for ; Thu, 27 Apr 2017 14:37:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934303AbdD0Oh4 (ORCPT ); Thu, 27 Apr 2017 10:37:56 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:33938 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932146AbdD0Ohz (ORCPT ); Thu, 27 Apr 2017 10:37:55 -0400 Received: by mail-wr0-f195.google.com with SMTP id 6so4029732wrb.1; Thu, 27 Apr 2017 07:37:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=2MdpL5UHPiJxxZrLzEM4D6YO6HGxhUAWCNHzXXmPB8w=; b=LWGiWGg5f1oVghtg9nnuUQOgJIDjxuLYxqWzBPYYZSINBLXXJuZmy9OWj7sGSzux/R wA+3H/8jK/4dojQONfpB5fYSTSvAsFTNtju8Rj163MJ8NwdZ8ngok9SVWYJMHfwuHleu AX014hS1i+LiSNIhCWXHPbNV2PKs7bAT0TOC6GCe4IApnsSPIdzDWHEMskic3OlO2tBY 95h8FMj0BPfcARGtL5YDG4LuKOWq+l9hJaUgq9XwTuHm36RugzXSifco0DzVe3vc4Yre 84epqvW4x3bqGKIRhRVgt5ARHiEO3LmByUf3x+85LN0PyAsOhTIza/dYjxnKHamYGcGY qf5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=2MdpL5UHPiJxxZrLzEM4D6YO6HGxhUAWCNHzXXmPB8w=; b=HqmBlnatX/rqx+Z2IxZSaX8MtDgOuttO4ve7oqjTuuuFVM1emT+L6X/Lj6NmQ98aTY EXHzeZnX5Ig1Q2WJIEfDxrwujArsDXAeMJqFxZUwaEVOPJaHMgqfOg/JVxteQdqBX187 DkM5CL9JHW5joN+9KGW4OA3BmBb06grd5RZN5Hq3IDavG6XKDjn5a4soBsv1mzzQpORq 7ErWA/QwbzSqIZgRgn/Tb4OJCucd3Ta9YY/cB/c7XmyIh9VVT6H8W2Z4kbja/5eWIq6w z0O7TINlRW0dvdnbofxWdSmHovVIcExYQ2OaiQ4FtIPsShjWAqdEAdqiR4LFQRJSfvHu Xx1A== X-Gm-Message-State: AN3rC/7hZ7k9xtL6HDFK8X0SMLd/yN2A5dL/l361FA5xdWQbpqbsbqgH yT1wvYmz3aiTfA== X-Received: by 10.80.135.87 with SMTP id 23mr4914832edv.148.1493303873441; Thu, 27 Apr 2017 07:37:53 -0700 (PDT) Received: from groucho.site (ipbcc0294b.dynamic.kabel-deutschland.de. [188.192.41.75]) by smtp.gmail.com with ESMTPSA id x18sm1295067eda.39.2017.04.27.07.37.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 27 Apr 2017 07:37:52 -0700 (PDT) From: Ulrich Hecht To: geert@glider.be, horms@verge.net.au Cc: linux-pwm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, magnus.damm@gmail.com, laurent.pinchart@ideasonboard.com, Takeshi Kihara , Ulrich Hecht Subject: [PATCH v2 1/8] pinctrl: sh-pfc: r8a7796: Add PWM pins, groups and functions Date: Thu, 27 Apr 2017 16:37:36 +0200 Message-Id: <1493303863-23719-2-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1493303863-23719-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1493303863-23719-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Takeshi Kihara This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to R8A7796 SoC. Signed-off-by: Takeshi Kihara Signed-off-by: Ulrich Hecht --- drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 153 +++++++++++++++++++++++++++++++++++ 1 file changed, 153 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index b0362ae..668c688 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c @@ -2955,6 +2955,105 @@ static const unsigned int msiof3_rxd_e_mux[] = { MSIOF3_RXD_E_MARK, }; +/* - PWM0 --------------------------------------------------------------------*/ +static const unsigned int pwm0_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int pwm0_mux[] = { + PWM0_MARK, +}; +/* - PWM1 --------------------------------------------------------------------*/ +static const unsigned int pwm1_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 7), +}; +static const unsigned int pwm1_a_mux[] = { + PWM1_A_MARK, +}; +static const unsigned int pwm1_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int pwm1_b_mux[] = { + PWM1_B_MARK, +}; +/* - PWM2 --------------------------------------------------------------------*/ +static const unsigned int pwm2_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 8), +}; +static const unsigned int pwm2_a_mux[] = { + PWM2_A_MARK, +}; +static const unsigned int pwm2_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int pwm2_b_mux[] = { + PWM2_B_MARK, +}; +/* - PWM3 --------------------------------------------------------------------*/ +static const unsigned int pwm3_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 0), +}; +static const unsigned int pwm3_a_mux[] = { + PWM3_A_MARK, +}; +static const unsigned int pwm3_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int pwm3_b_mux[] = { + PWM3_B_MARK, +}; +/* - PWM4 --------------------------------------------------------------------*/ +static const unsigned int pwm4_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 1), +}; +static const unsigned int pwm4_a_mux[] = { + PWM4_A_MARK, +}; +static const unsigned int pwm4_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int pwm4_b_mux[] = { + PWM4_B_MARK, +}; +/* - PWM5 --------------------------------------------------------------------*/ +static const unsigned int pwm5_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 2), +}; +static const unsigned int pwm5_a_mux[] = { + PWM5_A_MARK, +}; +static const unsigned int pwm5_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 4), +}; +static const unsigned int pwm5_b_mux[] = { + PWM5_B_MARK, +}; +/* - PWM6 --------------------------------------------------------------------*/ +static const unsigned int pwm6_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int pwm6_a_mux[] = { + PWM6_A_MARK, +}; +static const unsigned int pwm6_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 5), +}; +static const unsigned int pwm6_b_mux[] = { + PWM6_B_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX, TX */ @@ -3565,6 +3664,19 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof3_ss2_e), SH_PFC_PIN_GROUP(msiof3_txd_e), SH_PFC_PIN_GROUP(msiof3_rxd_e), + SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm1_a), + SH_PFC_PIN_GROUP(pwm1_b), + SH_PFC_PIN_GROUP(pwm2_a), + SH_PFC_PIN_GROUP(pwm2_b), + SH_PFC_PIN_GROUP(pwm3_a), + SH_PFC_PIN_GROUP(pwm3_b), + SH_PFC_PIN_GROUP(pwm4_a), + SH_PFC_PIN_GROUP(pwm4_b), + SH_PFC_PIN_GROUP(pwm5_a), + SH_PFC_PIN_GROUP(pwm5_b), + SH_PFC_PIN_GROUP(pwm6_a), + SH_PFC_PIN_GROUP(pwm6_b), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -3879,6 +3991,40 @@ static const char * const msiof3_groups[] = { "msiof3_rxd_e", }; +static const char * const pwm0_groups[] = { + "pwm0", +}; + +static const char * const pwm1_groups[] = { + "pwm1_a", + "pwm1_b", +}; + +static const char * const pwm2_groups[] = { + "pwm2_a", + "pwm2_b", +}; + +static const char * const pwm3_groups[] = { + "pwm3_a", + "pwm3_b", +}; + +static const char * const pwm4_groups[] = { + "pwm4_a", + "pwm4_b", +}; + +static const char * const pwm5_groups[] = { + "pwm5_a", + "pwm5_b", +}; + +static const char * const pwm6_groups[] = { + "pwm6_a", + "pwm6_b", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -3991,6 +4137,13 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), + SH_PFC_FUNCTION(pwm0), + SH_PFC_FUNCTION(pwm1), + SH_PFC_FUNCTION(pwm2), + SH_PFC_FUNCTION(pwm3), + SH_PFC_FUNCTION(pwm4), + SH_PFC_FUNCTION(pwm5), + SH_PFC_FUNCTION(pwm6), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif2),