===================================================================
@@ -60,6 +60,10 @@
clock-frequency = <20000000>;
};
+&can_clk {
+ clock-frequency = <48000000>;
+};
+
&pfc {
scif0_pins: scif0 {
groups = "scif0_data";
@@ -81,6 +85,11 @@
function = "lbsc";
};
};
+
+ can0_pins: can0 {
+ groups = "can0_data", "can_clk";
+ function = "can0";
+ };
};
&scif0 {
@@ -95,4 +104,11 @@
pinctrl-names = "default";
status = "okay";
+};
+
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
};
Define the Blanche board dependent part of the CAN0 device node along with the CAN_CLK crystal... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm/boot/dts/r8a7792-blanche.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)