From patchwork Fri Jul 28 11:41:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Kaneko X-Patchwork-Id: 9868521 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 39D2E6035E for ; Fri, 28 Jul 2017 11:41:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10232286F8 for ; Fri, 28 Jul 2017 11:41:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04B662886F; Fri, 28 Jul 2017 11:41:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 706DD286F8 for ; Fri, 28 Jul 2017 11:41:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751690AbdG1Lld (ORCPT ); Fri, 28 Jul 2017 07:41:33 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:38881 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751606AbdG1Llc (ORCPT ); Fri, 28 Jul 2017 07:41:32 -0400 Received: by mail-pg0-f67.google.com with SMTP id 125so9950435pgi.5; Fri, 28 Jul 2017 04:41:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eHWdsf4ZsFEfT4F7FCQfeIVOQ62INfSgJpd61lakXME=; b=tt2fxJkdv2bjJWiMsPVlG02HDt/Xkum980oFBR1pUv9cKAHshuoo8wml+HZL6mIlu4 no6GQzUvQmTwvZjoO/l0YgqTqQF1KGwADN86WhTdP0vxwU4HDyARl3YJXFXPDzG2jDDN 7A3/IgWbDUfGmReq90nEJ6wlvU7j2LTS7fE0od7LC5LUREOERJ5zADvbA/anW4hlAjaw DiFiMiZIT2tJImlD62foxC06r6Yv4uRb4bdRFfXoIeJBu7BG+laT7BaAUxKt98OxVA+E /NjEXjALZM369nxUowZlYinsBI0UUsmxvm2E9JJbJcs2J1yZxrixUvwan264nc7IPdSy 5KDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eHWdsf4ZsFEfT4F7FCQfeIVOQ62INfSgJpd61lakXME=; b=P3XFqekP33ZOIHCPbFByfiUPPv/snr8A2hFDLA3iXLiaKVPgBGU90tgOViJXEpY0pu G0viYwWft5dR6nb1U0KnAUVGvnCVXdvxr47Mny0jN3HLgcFQahSqsajmOV3Pl0WyjJP6 8f6VoPrjSXu7FLTliJsQwyocbyOJvmfmeVssrfXzE1upALWVEkF1JZOuCgu1eJ7bG/p5 0LZ/AwfT751YGCPLVNx42HUDXYd4QLv/ApR46iIzZgUCBpLtUwX73Svsdha6mtBdt2Da NQ/RfEqEzJ8KkxNM4I1GOyN77LumLr6u4qq1wKwBpVr0M+Po0otCp+/CfMLMLQ6dpdp2 KjPg== X-Gm-Message-State: AIVw1127JtRiTfKrPTnQmPSfZdC1HAggNthDHLsEiHqVP4armBBqjrwe gr/oxUF74b+zq/RH X-Received: by 10.84.191.131 with SMTP id a3mr7774125pld.182.1501242091836; Fri, 28 Jul 2017 04:41:31 -0700 (PDT) Received: from macc.flets-east.jp (p5639044-ipngn4004marunouchi.tokyo.ocn.ne.jp. [180.31.129.44]) by smtp.gmail.com with ESMTPSA id w82sm36660445pfa.39.2017.07.28.04.41.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 28 Jul 2017 04:41:31 -0700 (PDT) From: Yoshihiro Kaneko To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Laurent Pinchart , Geert Uytterhoeven , Simon Horman , Magnus Damm , linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/9] pinctrl: sh-pfc: r8a7795: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_D Date: Fri, 28 Jul 2017 20:41:13 +0900 Message-Id: <1501242081-3805-2-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1501242081-3805-1-git-send-email-ykaneko0929@gmail.com> References: <1501242081-3805-1-git-send-email-ykaneko0929@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Takeshi Kihara This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7795 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: 0b0ffc96dbe3 ("pinctrl: sh-pfc: Initial R8A7795 PFC support) Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c index 1656295..73507bf 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c @@ -1460,7 +1460,7 @@ enum { PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_B), PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI_1), PINMUX_IPSR_MSEL(IP17_27_24, TS_SDEN1_D, SEL_TSIF1_3), - PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_3), PINMUX_IPSR_MSEL(IP17_27_24, STP_OPWM_0_E, SEL_SSP1_0_4), PINMUX_IPSR_MSEL(IP17_27_24, RIF3_D0_B, SEL_DRIF3_1), PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU_1),