From patchwork Wed Sep 13 17:05:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Paterson X-Patchwork-Id: 9951695 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B004E604D5 for ; Wed, 13 Sep 2017 17:06:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B9FE28A5C for ; Wed, 13 Sep 2017 17:06:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 905F8289EB; Wed, 13 Sep 2017 17:06:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E77928C64 for ; Wed, 13 Sep 2017 17:06:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751120AbdIMRGH (ORCPT ); Wed, 13 Sep 2017 13:06:07 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:35870 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751054AbdIMRGG (ORCPT ); Wed, 13 Sep 2017 13:06:06 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie3.idc.renesas.com with ESMTP; 14 Sep 2017 02:06:05 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id F11E84BFE5; Thu, 14 Sep 2017 02:06:05 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.42,389,1500908400"; d="scan'208";a="257789608" Received: from unknown (HELO renesas-VirtualBox.ree.adwin.renesas.com) ([10.226.36.243]) by relmlii2.idc.renesas.com with ESMTP; 14 Sep 2017 02:06:01 +0900 From: Chris Paterson To: Simon Horman Cc: Rob Herring , Mark Rutland , Magnus Damm , Russell King , Fabrizio Castro , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Chris Paterson Subject: [PATCH 4/8] ARM: dts: iwg22d: Enable SDHI0 controller Date: Wed, 13 Sep 2017 18:05:37 +0100 Message-Id: <1505322341-9480-5-git-send-email-chris.paterson2@renesas.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505322341-9480-1-git-send-email-chris.paterson2@renesas.com> References: <1505322341-9480-1-git-send-email-chris.paterson2@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fabrizio Castro Enable the SDHI0 controller on iWave RZ/G1E carrier board. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Reviewed-by: Geert Uytterhoeven --- This patch is based on renesas-devel-20170913-v4.13. arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 37 +++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index aac84c6..c34dbe7 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -24,6 +24,19 @@ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &pfc { @@ -36,6 +49,18 @@ groups = "avb_mdio", "avb_gmii"; function = "avb"; }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; }; &scif4 { @@ -63,3 +88,15 @@ micrel,led-mode = <1>; }; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; + sd-uhs-sdr104; + status = "okay"; +};