From patchwork Mon Dec 18 18:04:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10121413 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B4E53603B5 for ; Mon, 18 Dec 2017 18:06:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF579288E2 for ; Mon, 18 Dec 2017 18:06:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A3D9B289AB; Mon, 18 Dec 2017 18:06:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 263DD288E2 for ; Mon, 18 Dec 2017 18:06:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934107AbdLRSGP (ORCPT ); Mon, 18 Dec 2017 13:06:15 -0500 Received: from relmlor3.renesas.com ([210.160.252.173]:49061 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933986AbdLRSGL (ORCPT ); Mon, 18 Dec 2017 13:06:11 -0500 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 19 Dec 2017 03:06:09 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 9EB7C46D17; Tue, 19 Dec 2017 03:06:09 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.45,422,1508770800"; d="scan'208";a="266786195" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 19 Dec 2017 03:06:07 +0900 From: Biju Das To: Laurent Pinchart , Geert Uytterhoeven , Linus Walleij Cc: Simon Horman , Magnus Damm , Chris Paterson , Fabrizio Castro , linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH] pinctrl: sh-pfc: r8a7794: Add i2c5 pin groups and function Date: Mon, 18 Dec 2017 18:04:03 +0000 Message-Id: <1513620243-4188-1-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 1.9.1 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add i2c5 pin groups and function to r8a7745 PFC driver. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- This patch is based on renesas devel tag renesas-devel-20171218-v4.15-rc4 drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 41 ++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c index f133b4f..1640024 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c @@ -2228,6 +2228,35 @@ enum { static const unsigned int i2c4_e_mux[] = { I2C4_SCL_E_MARK, I2C4_SDA_E_MARK, }; +/* - I2C5 ------------------------------------------------------------------- */ +static const unsigned int i2c5_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15), +}; +static const unsigned int i2c5_mux[] = { + I2C5_SCL_MARK, I2C5_SDA_MARK, +}; +static const unsigned int i2c5_b_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), +}; +static const unsigned int i2c5_b_mux[] = { + I2C5_SCL_B_MARK, I2C5_SDA_B_MARK, +}; +static const unsigned int i2c5_c_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), +}; +static const unsigned int i2c5_c_mux[] = { + I2C5_SCL_C_MARK, I2C5_SDA_C_MARK, +}; +static const unsigned int i2c5_d_pins[] = { + /* SCL, SDA */ + RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14), +}; +static const unsigned int i2c5_d_mux[] = { + I2C5_SCL_D_MARK, I2C5_SDA_D_MARK, +}; /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ0 */ @@ -3821,6 +3850,10 @@ enum { SH_PFC_PIN_GROUP(i2c4_c), SH_PFC_PIN_GROUP(i2c4_d), SH_PFC_PIN_GROUP(i2c4_e), + SH_PFC_PIN_GROUP(i2c5), + SH_PFC_PIN_GROUP(i2c5_b), + SH_PFC_PIN_GROUP(i2c5_c), + SH_PFC_PIN_GROUP(i2c5_d), SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), @@ -4196,6 +4229,13 @@ enum { "i2c4_e", }; +static const char * const i2c5_groups[] = { + "i2c5", + "i2c5_b", + "i2c5_c", + "i2c5_d", +}; + static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", @@ -4537,6 +4577,7 @@ enum { SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c4), + SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(intc), SH_PFC_FUNCTION(mmc), SH_PFC_FUNCTION(msiof0),