Message ID | 151630244106.14098.1751390484334216468.sendpatchset@little-apple (mailing list archive) |
---|---|
State | RFC |
Delegated to: | Simon Horman |
Headers | show |
Hello! On 1/18/2018 10:07 PM, Magnus Damm wrote: > From: Magnus Damm <damm+renesas@opensource.se> > > Add DT nodes for the PFC on the r8a77970 SoC and hook up the SCIF > console to make use of the PFC to configure the pins. > > Signed-off-by: Magnus Damm <damm+renesas@opensource.se> > --- > > Depends on r8a77970 PFC support - included in latest renesas-drivers Magnus, I have already posted R8A77970 PFC stuff back in November: https://patchwork.kernel.org/patch/10053687/ https://patchwork.kernel.org/patch/10053689/ MBR, Sergei
--- 0001/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ work/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts 2018-01-19 03:43:18.050607110 +0900 @@ -52,11 +52,21 @@ clock-frequency = <32768>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay"; }; &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; --- 0001/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ work/arch/arm64/boot/dts/renesas/r8a77970.dtsi 2018-01-19 03:43:36.990607110 +0900 @@ -117,6 +117,11 @@ reg = <0 0xe6160000 0 0x200>; }; + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a77970"; + reg = <0 0xe6060000 0 0x504>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a77970-sysc"; reg = <0 0xe6180000 0 0x440>;