From patchwork Wed Apr 18 20:14:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Kaneko X-Patchwork-Id: 10348889 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0A0E26053F for ; Wed, 18 Apr 2018 20:15:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EBA28283A6 for ; Wed, 18 Apr 2018 20:15:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD4F72884A; Wed, 18 Apr 2018 20:15:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6EE3D283A6 for ; Wed, 18 Apr 2018 20:15:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752306AbeDRUPE (ORCPT ); Wed, 18 Apr 2018 16:15:04 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:46871 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752280AbeDRUPC (ORCPT ); Wed, 18 Apr 2018 16:15:02 -0400 Received: by mail-pf0-f195.google.com with SMTP id h69so1443368pfe.13 for ; Wed, 18 Apr 2018 13:15:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fyyTO+DllXjofesfVWEL6dsDLrircq5bm9s/HCFoic0=; b=BzxhBuIkghANog02A8TCUryOZQ0oAK2tFXhU/zbP5wc1W7B1YoL+BECBFG2cu3RZgZ 6fsHe2+NFppupAc0EFmJpf5vK3GPfOgKYyluqX4KjCdrtjVfmhi3QZZ/QV+ielzmfVW/ zlDgkFCZteZZx8d/UGuSFLSwSyBjQoZ2zjauFKYNSqkMwXDeUL/ZFZEks+vc0RkkHhOX jzNfyJjsy5ipAQ3xbcEcFduj+qoCuymostItWZtcklYhElw0IzHCkfqTSC0vqZvUEYUs 7O7yyTXLZKNqO52DULtFbA3KEMF/Caxv+xGDPAbenmm2V+Tb1MGaJiY4Io1x4r2dvEHa 5Gnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fyyTO+DllXjofesfVWEL6dsDLrircq5bm9s/HCFoic0=; b=ZUTlGsxwvixk1QdoHNyN+t2+cYfMFdQtKwMBQJ4AcXudLfM4pWvIHr7AmzzkKU5cqe HqQSED6reWCUYg+A+wdDwZxqsVfVZNNNl4DYohMBztCoyrQTwB/G4OfotGd1wmeNvgsm FbmNRABbu3p0NzCrQG5whuLX4Kc5CekHWEL66guot4cL5TGpRcBSqeTmYtG5qhVb5PFi zkyP/oz6WZKrzL3nkIFMxfdgvA8+7/Fa3IqHTCenKFJsaB5DpOjxKYuMcUSXawECpNFu NgAR6Df93phcqhdXMSS2nkusbwHNm1kqFY/mCAm8Enz6hj1WKbih0vfLuPxB4LNIYMHg SjhQ== X-Gm-Message-State: ALQs6tCUoRAdgjQSDquMQLfwkptKSAUSxahWp8aIPBkrY1pgr2ASYAdJ rYBwLKitQ0d2U/OXS5TLrkesfg== X-Google-Smtp-Source: AIpwx49MbrEdCjfrq+kdh/aFNBoUYwv2z8PIEQbtyN0KuyrqOlw8PuUfTEwEYJvR0Ts90aOpgQ6eYA== X-Received: by 10.101.80.204 with SMTP id s12mr2770800pgp.191.1524082501474; Wed, 18 Apr 2018 13:15:01 -0700 (PDT) Received: from localhost.localdomain (KD118155013174.ppp-bb.dion.ne.jp. [118.155.13.174]) by smtp.gmail.com with ESMTPSA id j10sm6958355pfj.1.2018.04.18.13.14.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Apr 2018 13:15:00 -0700 (PDT) From: Yoshihiro Kaneko To: linux-renesas-soc@vger.kernel.org Cc: Simon Horman , Magnus Damm , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/5] arm64: dts: renesas: r8a77995: sort subnodes of the soc node Date: Thu, 19 Apr 2018 05:14:37 +0900 Message-Id: <1524082480-18163-3-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1524082480-18163-1-git-send-email-ykaneko0929@gmail.com> References: <1524082480-18163-1-git-send-email-ykaneko0929@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sort subnodes of the soc node. - The primary key is the bus address. - The secondary key is the IP block. - The tertiary key is the node name. This is part of an ongoing effort to provide consistent node order in the DT of Renesas SoCs to improve maintainability. This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 697 +++++++++++++++--------------- 1 file changed, 348 insertions(+), 349 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index cf47655..a978305 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -76,23 +76,6 @@ #size-cells = <2>; ranges; - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = ; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - rwdt: watchdog@e6020000 { compatible = "renesas,r8a77995-wdt", "renesas,rcar-gen3-wdt"; @@ -103,88 +86,123 @@ status = "disabled"; }; - ipmmu_vi0: mmu@febd0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_vp0: mmu@fe990000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_vc0: mmu@fe6b0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - #iommu-cells = <1>; - status = "disabled"; + gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6050000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 9>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 912>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 912>; }; - ipmmu_pv0: mmu@fd800000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - #iommu-cells = <1>; - status = "disabled"; + gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6051000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 911>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 911>; }; - ipmmu_hc: mmu@e6570000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - #iommu-cells = <1>; - status = "disabled"; + gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6052000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 910>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 910>; }; - ipmmu_rt: mmu@ffc80000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - #iommu-cells = <1>; - status = "disabled"; + gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6053000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 10>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 909>; }; - ipmmu_mp: mmu@ec670000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - #iommu-cells = <1>; - status = "disabled"; + gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6054000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 908>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 908>; }; - ipmmu_ds0: mmu@e6740000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - #iommu-cells = <1>; - status = "disabled"; + gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6055000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 21>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 907>; }; - ipmmu_ds1: mmu@e7740000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - #iommu-cells = <1>; - status = "disabled"; + gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6055400 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 14>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 906>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 906>; }; - ipmmu_mm: mmu@e67b0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = , - ; - #iommu-cells = <1>; - status = "disabled"; + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a77995"; + reg = <0 0xe6060000 0 0x508>; }; - cpg: clock-controller@e6150000 { compatible = "renesas,r8a77995-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; @@ -200,16 +218,6 @@ reg = <0 0xe6160000 0 0x0200>; }; - pfc: pin-controller@e6060000 { - compatible = "renesas,pfc-r8a77995"; - reg = <0 0xe6060000 0 0x508>; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - sysc: system-controller@e6180000 { compatible = "renesas,r8a77995-sysc"; reg = <0 0xe6180000 0 0x0400>; @@ -232,6 +240,98 @@ resets = <&cpg 407>; }; + i2c0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77995", + "renesas,rcar-gen3-i2c"; + reg = <0 0xe6500000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 931>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 931>; + dmas = <&dmac1 0x91>, <&dmac1 0x90>, + <&dmac2 0x91>, <&dmac2 0x90>; + dma-names = "tx", "rx", "tx", "rx"; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c1: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77995", + "renesas,rcar-gen3-i2c"; + reg = <0 0xe6508000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 930>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 930>; + dmas = <&dmac1 0x93>, <&dmac1 0x92>, + <&dmac2 0x93>, <&dmac2 0x92>; + dma-names = "tx", "rx", "tx", "rx"; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c2: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77995", + "renesas,rcar-gen3-i2c"; + reg = <0 0xe6510000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 929>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 929>; + dmas = <&dmac1 0x95>, <&dmac1 0x94>, + <&dmac2 0x95>, <&dmac2 0x94>; + dma-names = "tx", "rx", "tx", "rx"; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c3: i2c@e66d0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77995", + "renesas,rcar-gen3-i2c"; + reg = <0 0xe66d0000 0 0x40>; + interrupts = ; + clocks = <&cpg CPG_MOD 928>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 928>; + dmas = <&dmac0 0x97>, <&dmac0 0x96>; + dma-names = "tx", "rx"; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + canfd: can@e66c0000 { + compatible = "renesas,r8a77995-canfd", + "renesas,rcar-gen3-canfd"; + reg = <0 0xe66c0000 0 0x8000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 914>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 914>; + status = "disabled"; + + channel0 { + status = "disabled"; + }; + + channel1 { + status = "disabled"; + }; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a77995", "renesas,rcar-dmac"; @@ -304,173 +404,85 @@ dma-channels = <8>; }; - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6050000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 9>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6051000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 911>; + ipmmu_ds0: mmu@e6740000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe6740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + #iommu-cells = <1>; + status = "disabled"; }; - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6052000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 910>; + ipmmu_ds1: mmu@e7740000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + #iommu-cells = <1>; + status = "disabled"; }; - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6053000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 10>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 909>; + ipmmu_hc: mmu@e6570000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe6570000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + #iommu-cells = <1>; + status = "disabled"; }; - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6054000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 908>; + ipmmu_mm: mmu@e67b0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = , + ; + #iommu-cells = <1>; + status = "disabled"; }; - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6055000 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 21>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 907>; + ipmmu_mp: mmu@ec670000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xec670000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + #iommu-cells = <1>; + status = "disabled"; }; - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio", - "renesas,gpio-rcar"; - reg = <0 0xe6055400 0 0x50>; - interrupts = ; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 14>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 906>; + ipmmu_pv0: mmu@fd800000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfd800000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + #iommu-cells = <1>; + status = "disabled"; }; - can0: can@e6c30000 { - compatible = "renesas,can-r8a77995", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = ; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 916>; + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xffc80000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 10>; + #iommu-cells = <1>; status = "disabled"; }; - can1: can@e6c38000 { - compatible = "renesas,can-r8a77995", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = ; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 915>; + ipmmu_vc0: mmu@fe6b0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfe6b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 12>; + #iommu-cells = <1>; status = "disabled"; }; - canfd: can@e66c0000 { - compatible = "renesas,r8a77995-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = , - ; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 914>; + ipmmu_vi0: mmu@febd0000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 14>; + #iommu-cells = <1>; status = "disabled"; + }; - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; + ipmmu_vp0: mmu@fe990000 { + compatible = "renesas,ipmmu-r8a77995"; + reg = <0 0xfe990000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 16>; + #iommu-cells = <1>; + status = "disabled"; }; avb: ethernet@e6800000 { @@ -519,87 +531,35 @@ status = "disabled"; }; - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = ; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = ; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = ; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = ; - clocks = <&cpg CPG_MOD 929>; + can0: can@e6c30000 { + compatible = "renesas,can-r8a77995", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c30000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; + resets = <&cpg 916>; status = "disabled"; }; - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = ; - clocks = <&cpg CPG_MOD 928>; + can1: can@e6c38000 { + compatible = "renesas,can-r8a77995", + "renesas,rcar-gen3-can"; + reg = <0 0xe6c38000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A77995_CLK_CANFD>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; + assigned-clock-rates = <40000000>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; + resets = <&cpg 915>; status = "disabled"; }; @@ -643,38 +603,43 @@ status = "disabled"; }; - sdhi2: sd@ee140000 { - compatible = "renesas,sdhi-r8a77995", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = ; - clocks = <&cpg CPG_MOD 312>; - max-frequency = <200000000>; + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a77995", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 310>, + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x13>, <&dmac1 0x12>, + <&dmac2 0x13>, <&dmac2 0x12>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 312>; + resets = <&cpg 310>; status = "disabled"; }; - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; - companion = <&ohci0>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 703>; status = "disabled"; }; - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; interrupts = ; clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; + companion = <&ohci0>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 703>; status = "disabled"; @@ -692,6 +657,35 @@ status = "disabled"; }; + sdhi2: sd@ee140000 { + compatible = "renesas,sdhi-r8a77995", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee140000 0 0x2000>; + interrupts = ; + clocks = <&cpg CPG_MOD 312>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 312>; + status = "disabled"; + }; + + gic: interrupt-controller@f1010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xf1010000 0 0x1000>, + <0x0 0xf1020000 0 0x20000>, + <0x0 0xf1040000 0 0x20000>, + <0x0 0xf1060000 0 0x20000>; + interrupts = ; + clocks = <&cpg CPG_MOD 408>; + clock-names = "clk"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 408>; + }; + vspbs: vsp@fe960000 { compatible = "renesas,vsp2"; reg = <0 0xfe960000 0 0x8000>; @@ -702,15 +696,6 @@ renesas,fcp = <&fcpvb0>; }; - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 607>; - iommus = <&ipmmu_vp0 5>; - }; - vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x8000>; @@ -721,15 +706,6 @@ renesas,fcp = <&fcpvd0>; }; - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; reg = <0 0xfea28000 0 0x8000>; @@ -740,6 +716,24 @@ renesas,fcp = <&fcpvd1>; }; + fcpvb0: fcp@fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 607>; + iommus = <&ipmmu_vp0 5>; + }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 603>; + iommus = <&ipmmu_vi0 8>; + }; + fcpvd1: fcp@fea2f000 { compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>; @@ -783,6 +777,11 @@ }; }; }; + + prr: chipid@fff00044 { + compatible = "renesas,prr"; + reg = <0 0xfff00044 0 4>; + }; }; timer {