From patchwork Thu Aug 2 14:11:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 10553671 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D0A159093 for ; Thu, 2 Aug 2018 14:17:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C19F52C0EB for ; Thu, 2 Aug 2018 14:17:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B578A2C0FA; Thu, 2 Aug 2018 14:17:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 51A892C0EB for ; Thu, 2 Aug 2018 14:17:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732529AbeHBQIo (ORCPT ); Thu, 2 Aug 2018 12:08:44 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:28310 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732419AbeHBQIn (ORCPT ); Thu, 2 Aug 2018 12:08:43 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 02 Aug 2018 23:17:18 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id B76E47D0E2; Thu, 2 Aug 2018 23:17:18 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.51,436,1526310000"; d="scan'208";a="288644476" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii2.idc.renesas.com with ESMTP; 02 Aug 2018 23:17:16 +0900 From: Biju Das To: Linus Walleij Cc: Biju Das , linux-gpio@vger.kernel.org, Simon Horman , Geert Uytterhoeven , Chris Paterson , Fabrizio Castro , linux-renesas-soc@vger.kernel.org Subject: [PATCH v2 1/5] gpio: rcar: Add GPIO hole support Date: Thu, 2 Aug 2018 15:11:23 +0100 Message-Id: <1533219087-33695-2-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533219087-33695-1-git-send-email-biju.das@bp.renesas.com> References: <1533219087-33695-1-git-send-email-biju.das@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in the range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins between GP3_17 to GP3_26 are unused. Add support for handling unused GPIO's. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro --- V1-->V2 * Added gpio-reserved-ranges support for handling unused gpios. --- drivers/gpio/gpio-rcar.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 350390c..378c6e9 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -38,6 +38,7 @@ struct gpio_rcar_bank_info { u32 edglevel; u32 bothedge; u32 intmsk; + u32 gpiomsk; }; struct gpio_rcar_priv { @@ -252,6 +253,9 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) struct gpio_rcar_priv *p = gpiochip_get_data(chip); int error; + if (!gpiochip_line_is_valid(chip, offset)) + return -EINVAL; + error = pm_runtime_get_sync(&p->pdev->dev); if (error < 0) return error; @@ -313,6 +317,9 @@ static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long flags; u32 val, bankmask; + if (chip->valid_mask && (mask[0] & p->bank_info.gpiomsk)) + return; + bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0); if (!bankmask) return; @@ -399,7 +406,8 @@ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins) struct device_node *np = p->pdev->dev.of_node; const struct gpio_rcar_info *info; struct of_phandle_args args; - int ret; + int ret, len, i; + u32 start, count; info = of_device_get_match_data(&p->pdev->dev); @@ -414,6 +422,22 @@ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins) *npins = RCAR_MAX_GPIO_PER_BANK; } + p->bank_info.gpiomsk = 0; + len = of_property_count_u32_elems(np, "gpio-reserved-ranges"); + if (len < 0 || len % 2 != 0) + return 0; + + for (i = 0; i < len; i += 2) { + of_property_read_u32_index(np, "gpio-reserved-ranges", + i, &start); + of_property_read_u32_index(np, "gpio-reserved-ranges", + i + 1, &count); + if (start >= *npins || start + count >= *npins) + continue; + + p->bank_info.gpiomsk = GENMASK(start + count - 1, start); + } + return 0; } @@ -471,6 +495,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) gpio_chip->owner = THIS_MODULE; gpio_chip->base = -1; gpio_chip->ngpio = npins; + gpio_chip->need_valid_mask = p->bank_info.gpiomsk ? true : false; irq_chip = &p->irq_chip; irq_chip->name = name; @@ -551,6 +576,9 @@ static int gpio_rcar_resume(struct device *dev) for (offset = 0; offset < p->gpio_chip.ngpio; offset++) { mask = BIT(offset); + if (p->gpio_chip.valid_mask && (mask & p->bank_info.gpiomsk)) + continue; + /* I/O pin */ if (!(p->bank_info.iointsel & mask)) { if (p->bank_info.inoutsel & mask)