diff mbox series

[PROTO,01/10] drm: rcar-du: Add clk_set_rate for external clock device

Message ID 1534254604-24204-2-git-send-email-uli+renesas@fpond.eu (mailing list archive)
State RFC
Delegated to: Simon Horman
Headers show
Series R-Car D3 LVDS/HDMI support (with PLL) | expand

Commit Message

Ulrich Hecht Aug. 14, 2018, 1:49 p.m. UTC
From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Laurent Pinchart Aug. 20, 2018, 10:10 a.m. UTC | #1
Hi Ulrich,

Thank you for the patch.

On Tuesday, 14 August 2018 16:49:55 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> 
> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index b52b3e8..cd6803a 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -229,6 +229,7 @@ static void rcar_du_crtc_set_display_timing(struct
> rcar_du_crtc *rcrtc) unsigned long rate;
>  		u32 extdiv;
> 
> +		clk_set_rate(rcrtc->extclock, mode_clock);

This is a hack, Jacopo has posted "[PATCH 3/3] drm: rcar-du: Improve non-DPLL 
clock selection" which I think is a better solution (or will be in v2 :-)).

>  		extclk = clk_get_rate(rcrtc->extclock);
>  		if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
>  			unsigned long target = mode_clock;
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index b52b3e8..cd6803a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -229,6 +229,7 @@  static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
 		unsigned long rate;
 		u32 extdiv;
 
+		clk_set_rate(rcrtc->extclock, mode_clock);
 		extclk = clk_get_rate(rcrtc->extclock);
 		if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
 			unsigned long target = mode_clock;