From patchwork Thu Aug 16 07:16:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 10567053 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F1D941575 for ; Thu, 16 Aug 2018 07:17:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D93462AB33 for ; Thu, 16 Aug 2018 07:17:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C91B52AB6C; Thu, 16 Aug 2018 07:17:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1E2882AB62 for ; Thu, 16 Aug 2018 07:17:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389266AbeHPKOB (ORCPT ); Thu, 16 Aug 2018 06:14:01 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:17026 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389123AbeHPKOB (ORCPT ); Thu, 16 Aug 2018 06:14:01 -0400 Received: from grover.tkatk1.zaq.ne.jp (zaqdadce369.zaq.ne.jp [218.220.227.105]) (authenticated) by conuserg-09.nifty.com with ESMTP id w7G7Gu2J008336; Thu, 16 Aug 2018 16:16:59 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com w7G7Gu2J008336 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1534403819; bh=gF5opo/Kiw7WOd87rkvMyhDeYTHftPlTR9SgPTml9ZU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MaFvFiVF2zskgPyaFWeAoQcyTNOogkNjRVlr3wCSeyfC93xln1OuvtY1ESCxoHFxu 6NqYOlnav6goGujRu6FM1fWKeqehKaP/j+veAcey2HYfs4eUMAX6wLZTZPho7RJkOa HzYPbXHIq8dx/HktLEccau5iNY+1sZ90JwtQFWl64WpOsjUehaJMfkE6QFAb5KhBVk en/vTFdciu/lanJkO+xRl0eL/dgFwoQo3lj6bQfQwZZqeBa0pt7MFoOKigRkUM+9sv YIq9qWHsfQcD4as/xc35Kj4yhS5T+HQI5L1OnVblcyVkq4GNl45kQlC1qHqA9NnMT8 sVzTiZ5NEVBMw== X-Nifty-SrcIP: [218.220.227.105] From: Masahiro Yamada To: linux-mmc@vger.kernel.org, Wolfram Sang Cc: Masami Hiramatsu , Jassi Brar , Ulf Hansson , linux-renesas-soc@vger.kernel.org, Masahiro Yamada Subject: [PATCH v2 3/7] dt-bindings: mmc: add DT binding for UniPhier SD/eMMC controller Date: Thu, 16 Aug 2018 16:16:35 +0900 Message-Id: <1534403799-10594-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534403799-10594-1-git-send-email-yamada.masahiro@socionext.com> References: <1534403799-10594-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This SD/eMMC controller is used for UniPhier SoC family. Signed-off-by: Masahiro Yamada Reviewed-by: Rob Herring Acked-by: Wolfram Sang --- Changes in v2: - Rename compatible "socionext,uniphier-sd-v3.1b" to "socionext,uniphier-sd-v3.1.1" .../devicetree/bindings/mmc/uniphier-sd.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/uniphier-sd.txt diff --git a/Documentation/devicetree/bindings/mmc/uniphier-sd.txt b/Documentation/devicetree/bindings/mmc/uniphier-sd.txt new file mode 100644 index 0000000..e1d6587 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/uniphier-sd.txt @@ -0,0 +1,55 @@ +UniPhier SD/eMMC controller + +Required properties: +- compatible: should be one of the following: + "socionext,uniphier-sd-v2.91" - IP version 2.91 + "socionext,uniphier-sd-v3.1" - IP version 3.1 + "socionext,uniphier-sd-v3.1.1" - IP version 3.1.1 +- reg: offset and length of the register set for the device. +- interrupts: a single interrupt specifier. +- clocks: a single clock specifier of the controller clock. +- reset-names: should contain the following: + "host" - mandatory for all versions + "bridge" - should exist only for "socionext,uniphier-sd-v2.91" + "hw" - should exist if eMMC hw reset line is available +- resets: a list of reset specifiers, corresponding to the reset-names + +Optional properties: +- pinctrl-names: if present, should contain the following: + "default" - should exist for all instances + "uhs" - should exist for SD instance with UHS support +- pinctrl-0: pin control state for the default mode +- pinctrl-1: pin control state for the UHS mode +- dma-names: should be "rx-tx" if present. + This property can exist only for "socionext,uniphier-sd-v2.91". +- dmas: a single DMA channel specifier + This property can exist only for "socionext,uniphier-sd-v2.91". +- bus-width: see mmc.txt +- cap-sd-highspeed: see mmc.txt +- cap-mmc-highspeed: see mmc.txt +- sd-uhs-sdr12: see mmc.txt +- sd-uhs-sdr25: see mmc.txt +- sd-uhs-sdr50: see mmc.txt +- cap-mmc-hw-reset: should exist if reset-names contains "hw". see mmc.txt +- non-removable: see mmc.txt + +Example: + + sd: sdhc@5a400000 { + compatible = "socionext,uniphier-sd-v2.91"; + reg = <0x5a400000 0x200>; + interrupts = <0 76 4>; + pinctrl-names = "default", "uhs"; + pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_uhs>; + clocks = <&mio_clk 0>; + reset-names = "host", "bridge"; + resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + };