diff mbox series

[1/3] drm: rcar-du: Rename and document dpll_ch field

Message ID 1534922509-15197-2-git-send-email-jacopo+renesas@jmondi.org (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series drm: rcar-du: A few cosmetic changes | expand

Commit Message

Jacopo Mondi Aug. 22, 2018, 7:21 a.m. UTC
Document and re-name the 'dpll_ch' field to a more precise 'dpll_mask' for
consistency with the 'channels_mask' field defined in 'struct
rcar_du_device_info'.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +-
 drivers/gpu/drm/rcar-du/rcar_du_drv.c  | 6 +++---
 drivers/gpu/drm/rcar-du/rcar_du_drv.h  | 3 ++-
 3 files changed, 6 insertions(+), 5 deletions(-)

Comments

Laurent Pinchart Aug. 22, 2018, 8:17 a.m. UTC | #1
Hi Jacopo,

Thank you for the patch.

On Wednesday, 22 August 2018 10:21:47 EEST Jacopo Mondi wrote:
> Document and re-name the 'dpll_ch' field to a more precise 'dpll_mask' for
> consistency with the 'channels_mask' field defined in 'struct
> rcar_du_device_info'.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +-
>  drivers/gpu/drm/rcar-du/rcar_du_drv.c  | 6 +++---
>  drivers/gpu/drm/rcar-du/rcar_du_drv.h  | 3 ++-
>  3 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 2664336..5454884 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -211,7 +211,7 @@ static void rcar_du_crtc_set_display_timing(struct
> rcar_du_crtc *rcrtc) u32 dsmr;
>  	u32 escr;
> 
> -	if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
> +	if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {
>  		unsigned long target = mode_clock;
>  		struct dpll_info dpll = { 0 };
>  		unsigned long extclk;
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index 02aee6c..b42145c 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> @@ -215,7 +215,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7795_info = { },
>  	},
>  	.num_lvds = 1,
> -	.dpll_ch =  BIT(2) | BIT(1),
> +	.dpll_mask =  BIT(2) | BIT(1),
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a7796_info = {
> @@ -243,7 +243,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7796_info = { },
>  	},
>  	.num_lvds = 1,
> -	.dpll_ch =  BIT(1),
> +	.dpll_mask =  BIT(1),
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a77965_info = {
> @@ -271,7 +271,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a77965_info = { },
>  	},
>  	.num_lvds = 1,
> -	.dpll_ch =  BIT(1),
> +	.dpll_mask =  BIT(1),
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a77970_info = {
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> b/drivers/gpu/drm/rcar-du/rcar_du_drv.h index b3a25e8..6453b33 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> @@ -55,6 +55,7 @@ struct rcar_du_output_routing {
>   * @channels_mask: bit mask of available DU channels
>   * @routes: array of CRTC to output routes, indexed by output
> (RCAR_DU_OUTPUT_*) * @num_lvds: number of internal LVDS encoders
> + * @dpll_mask: mask of DU channels equipped with a DPLL

I'd way "bit mask" instead of "mask" in the description. Apart from that,

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

and taken in my tree.

>   */
>  struct rcar_du_device_info {
>  	unsigned int gen;
> @@ -63,7 +64,7 @@ struct rcar_du_device_info {
>  	unsigned int channels_mask;
>  	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
>  	unsigned int num_lvds;
> -	unsigned int dpll_ch;
> +	unsigned int dpll_mask;
>  };
> 
>  #define RCAR_DU_MAX_CRTCS		4
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index 2664336..5454884 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -211,7 +211,7 @@  static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
 	u32 dsmr;
 	u32 escr;
 
-	if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
+	if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {
 		unsigned long target = mode_clock;
 		struct dpll_info dpll = { 0 };
 		unsigned long extclk;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 02aee6c..b42145c 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -215,7 +215,7 @@  static const struct rcar_du_device_info rcar_du_r8a7795_info = {
 		},
 	},
 	.num_lvds = 1,
-	.dpll_ch =  BIT(2) | BIT(1),
+	.dpll_mask =  BIT(2) | BIT(1),
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7796_info = {
@@ -243,7 +243,7 @@  static const struct rcar_du_device_info rcar_du_r8a7796_info = {
 		},
 	},
 	.num_lvds = 1,
-	.dpll_ch =  BIT(1),
+	.dpll_mask =  BIT(1),
 };
 
 static const struct rcar_du_device_info rcar_du_r8a77965_info = {
@@ -271,7 +271,7 @@  static const struct rcar_du_device_info rcar_du_r8a77965_info = {
 		},
 	},
 	.num_lvds = 1,
-	.dpll_ch =  BIT(1),
+	.dpll_mask =  BIT(1),
 };
 
 static const struct rcar_du_device_info rcar_du_r8a77970_info = {
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index b3a25e8..6453b33 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -55,6 +55,7 @@  struct rcar_du_output_routing {
  * @channels_mask: bit mask of available DU channels
  * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
  * @num_lvds: number of internal LVDS encoders
+ * @dpll_mask: mask of DU channels equipped with a DPLL
  */
 struct rcar_du_device_info {
 	unsigned int gen;
@@ -63,7 +64,7 @@  struct rcar_du_device_info {
 	unsigned int channels_mask;
 	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
 	unsigned int num_lvds;
-	unsigned int dpll_ch;
+	unsigned int dpll_mask;
 };
 
 #define RCAR_DU_MAX_CRTCS		4