| Message ID | 1536092561-6048-1-git-send-email-ykaneko0929@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | [PATCH/RFT] arm64: dts: renesas: r8a77990: Add all MSIOF device nodes | expand |
Hi Kaneko-san, On Tue, Sep 4, 2018 at 10:23 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds the device nodes for all MSIOF SPI controllers to > the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Thanks for your patch! Unfortunately this is a duplicate of https://www.spinics.net/lists/devicetree/msg246988.html. Sorry for stepping on your toes, I added MSIOF support for Ebisu to investigate MSIOF driver bugs. > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > @@ -14,6 +14,13 @@ > #address-cells = <2>; > #size-cells = <2>; > > + aliases { > + spi0 = &msiof0; > + spi1 = &msiof1; > + spi2 = &msiof2; > + spi3 = &msiof3; > + }; The SPI subsystem no longer needs aliases. Furthermore, aliases complicate DT overlay handling. > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > @@ -70,6 +77,13 @@ > clock-frequency = <0>; > }; > > + /* MSIOF reference clock - to be overridden by boards that provide it */ > + msiof_ref_clk: msiof-ref-clock { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; This clock does not exist. Board DTS should use "assigned-clocks" and "assigned-clock-rates" on the MSO clock instead. Gr{oetje,eeting}s, Geert
On Wed, Sep 05, 2018 at 08:52:56AM +0200, Geert Uytterhoeven wrote: > Hi Kaneko-san, > > On Tue, Sep 4, 2018 at 10:23 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > This patch adds the device nodes for all MSIOF SPI controllers to > > the R8A77990 SoC. > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > Thanks for your patch! > > Unfortunately this is a duplicate of > https://www.spinics.net/lists/devicetree/msg246988.html. > > Sorry for stepping on your toes, I added MSIOF support for Ebisu to investigate > MSIOF driver bugs. The DMA portions seem new. Perhaps a new patch should be constructed that only adds those properties? > > > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > @@ -14,6 +14,13 @@ > > #address-cells = <2>; > > #size-cells = <2>; > > > > + aliases { > > + spi0 = &msiof0; > > + spi1 = &msiof1; > > + spi2 = &msiof2; > > + spi3 = &msiof3; > > + }; > > The SPI subsystem no longer needs aliases. > Furthermore, aliases complicate DT overlay handling. > > > + > > cpus { > > #address-cells = <1>; > > #size-cells = <0>; > > @@ -70,6 +77,13 @@ > > clock-frequency = <0>; > > }; > > > > + /* MSIOF reference clock - to be overridden by boards that provide it */ > > + msiof_ref_clk: msiof-ref-clock { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <0>; > > + }; > > This clock does not exist. > > Board DTS should use "assigned-clocks" and "assigned-clock-rates" on the > MSO clock instead. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds >
Hi Simon, On Thu, Sep 6, 2018 at 11:25 AM Simon Horman <horms@verge.net.au> wrote: > On Wed, Sep 05, 2018 at 08:52:56AM +0200, Geert Uytterhoeven wrote: > > On Tue, Sep 4, 2018 at 10:23 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > This patch adds the device nodes for all MSIOF SPI controllers to > > > the R8A77990 SoC. > > > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > > > Thanks for your patch! > > > > Unfortunately this is a duplicate of > > https://www.spinics.net/lists/devicetree/msg246988.html. > > > > Sorry for stepping on your toes, I added MSIOF support for Ebisu to investigate > > MSIOF driver bugs. > > The DMA portions seem new. Yes it is. > Perhaps a new patch should be constructed that only adds those properties? To be added after testing MSIOF DMA ;-) Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 09e7b2f..438dd3a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -14,6 +14,13 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + spi0 = &msiof0; + spi1 = &msiof1; + spi2 = &msiof2; + spi3 = &msiof3; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -70,6 +77,13 @@ clock-frequency = <0>; }; + /* MSIOF reference clock - to be overridden by boards that provide it */ + msiof_ref_clk: msiof-ref-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -218,6 +232,72 @@ #power-domain-cells = <1>; }; + msiof0: spi@e6e90000 { + compatible = "renesas,msiof-r8a77990", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6e90000 0 0x0064>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 211>, <&msiof_ref_clk>; + clock-names = "msiof_clk", "msiof_ref_clk"; + dmas = <&dmac1 0x41>, <&dmac1 0x40>, + <&dmac2 0x41>, <&dmac2 0x40>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 211>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6ea0000 { + compatible = "renesas,msiof-r8a77990", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6ea0000 0 0x0064>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 210>, <&msiof_ref_clk>; + clock-names = "msiof_clk", "msiof_ref_clk"; + dmas = <&dmac1 0x43>, <&dmac1 0x42>, + <&dmac2 0x43>, <&dmac2 0x42>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 210>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6c00000 { + compatible = "renesas,msiof-r8a77990", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c00000 0 0x0064>; + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 209>, <&msiof_ref_clk>; + clock-names = "msiof_clk", "msiof_ref_clk"; + dmas = <&dmac0 0x45>, <&dmac0 0x44>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 209>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c10000 { + compatible = "renesas,msiof-r8a77990", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c10000 0 0x0064>; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 208>, <&msiof_ref_clk>; + clock-names = "msiof_clk", "msiof_ref_clk"; + dmas = <&dmac0 0x47>, <&dmac0 0x46>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 208>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac";