From patchwork Wed Oct 3 11:05:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10624601 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6657415A6 for ; Wed, 3 Oct 2018 11:06:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 514E22879D for ; Wed, 3 Oct 2018 11:06:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 433CA287A5; Wed, 3 Oct 2018 11:06:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 339C52879D for ; Wed, 3 Oct 2018 11:06:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726663AbeJCRyh (ORCPT ); Wed, 3 Oct 2018 13:54:37 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:38096 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726617AbeJCRyh (ORCPT ); Wed, 3 Oct 2018 13:54:37 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie3.idc.renesas.com with ESMTP; 03 Oct 2018 20:06:42 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id 9A3758D8E1; Wed, 3 Oct 2018 20:06:42 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,335,1534777200"; d="scan'208";a="294171610" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.36.250]) by relmlii2.idc.renesas.com with ESMTP; 03 Oct 2018 20:06:40 +0900 From: Fabrizio Castro To: Rob Herring , Simon Horman , Geert Uytterhoeven , Mark Rutland Cc: Fabrizio Castro , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 6/6] ARM: dts: iwg23s-sbc: Add uSD and eMMC support Date: Wed, 3 Oct 2018 12:05:44 +0100 Message-Id: <1538564744-15590-7-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538564744-15590-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1538564744-15590-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add uSD card and eMMC support to the iwg23s single board computer powered by the RZ/G1C SoC (a.k.a. r8a77470). Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das --- v1->v2: * Added eMMC support as well * Reworked title and changelog * Reworked voltage regulators for uSD card on sdhi2 --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 76 +++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 22da819..e5cfb50 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "r8a77470.dtsi" / { model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C"; @@ -25,6 +26,37 @@ device_type = "memory"; reg = <0 0x40000000 0 0x20000000>; }; + + reg_1p8v: reg-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: reg-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vccq_sdhi2: regulator-vccq-sdhi2 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &avb { @@ -46,10 +78,28 @@ }; &pfc { + mmc_pins_uhs: mmc_uhs { + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; + power-source = <1800>; + }; + scif1_pins: scif1 { groups = "scif1_data_b"; function = "scif1"; }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; }; &scif1 { @@ -58,3 +108,29 @@ status = "okay"; }; + +&sdhi1 { + pinctrl-0 = <&mmc_pins_uhs>; + pinctrl-names = "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + fixed-emmc-driver-type = <1>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <&vccq_sdhi2>; + bus-width = <4>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; + status = "okay"; +};