| Message ID | 1540071326-27428-1-git-send-email-ykaneko0929@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8fbe048bd95b560ed5fcb8eaa80456a64aeb66a2 |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | [PATCH/RFT] arm64: dts: renesas: r8a77990: Enable I2C DMA | expand |
On Sun, Oct 21, 2018 at 06:35:26AM +0900, Yoshihiro Kaneko wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch enables I2C DMA. > > NOTE: I2C7 DMA is not supported by R-Car Gen3 Hardware User's Manual > Rev.0.80E. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Base patch stack: * renesas-devel-20181121-v4.20-rc3 + "iommu/ipmmu-vmsa: Hook up r8a77990 DT matching code" + "pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions" + "pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions" Config: renesas_defconfig + IPMMU_VMSA Should we enable IPMMU_VMSA in arm64 defconfig and renesas_defconfig? Test with base patch stack: # grep dma /proc/interrupts | grep -v "0 0" (no output) # amixer set "DVC Out" 2% # play xyz.wav # grep dma /proc/interrupts | grep -v "0 0" (no output) Test with base patch stack + this patch applied: # grep dma /proc/interrupts | grep -v "0 0" (no output) # amixer set "DVC Out" 2% # play xyz.wav # grep dma /proc/interrupts | grep -v "0 0" 109: 512 0 GIC-0 352 Level ec700000.dma-controller:0 Tested-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> I plan to apply this patch for v4.21.
On Wed, Nov 21, 2018 at 01:02:57PM +0100, Simon Horman wrote: > On Sun, Oct 21, 2018 at 06:35:26AM +0900, Yoshihiro Kaneko wrote: > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > This patch enables I2C DMA. > > > > NOTE: I2C7 DMA is not supported by R-Car Gen3 Hardware User's Manual > > Rev.0.80E. > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > Base patch stack: > * renesas-devel-20181121-v4.20-rc3 > + "iommu/ipmmu-vmsa: Hook up r8a77990 DT matching code" > + "pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions" > + "pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions" > > Config: renesas_defconfig + IPMMU_VMSA > > Should we enable IPMMU_VMSA in arm64 defconfig and renesas_defconfig? > > Test with base patch stack: > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > # amixer set "DVC Out" 2% > # play xyz.wav > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > > Test with base patch stack + this patch applied: > # grep dma /proc/interrupts | grep -v "0 0" > (no output) > # amixer set "DVC Out" 2% > # play xyz.wav > # grep dma /proc/interrupts | grep -v "0 0" > 109: 512 0 GIC-0 352 Level ec700000.dma-controller:0 > > > Tested-by: Simon Horman <horms+renesas@verge.net.au> > Reviewed-by: Simon Horman <horms+renesas@verge.net.au> > > I plan to apply this patch for v4.21. Done.
On Sat, Oct 20, 2018 at 11:35 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch enables I2C DMA. > > NOTE: I2C7 DMA is not supported by R-Car Gen3 Hardware User's Manual > Rev.0.80E. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index a437862..9df0751 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -213,6 +213,9 @@ clocks = <&cpg CPG_MOD 931>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 931>; + dmas = <&dmac1 0x91>, <&dmac1 0x90>, + <&dmac2 0x91>, <&dmac2 0x90>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -227,6 +230,9 @@ clocks = <&cpg CPG_MOD 930>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 930>; + dmas = <&dmac1 0x93>, <&dmac1 0x92>, + <&dmac2 0x93>, <&dmac2 0x92>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -241,6 +247,9 @@ clocks = <&cpg CPG_MOD 929>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 929>; + dmas = <&dmac1 0x95>, <&dmac1 0x94>, + <&dmac2 0x95>, <&dmac2 0x94>; + dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -255,6 +264,8 @@ clocks = <&cpg CPG_MOD 928>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 928>; + dmas = <&dmac0 0x97>, <&dmac0 0x96>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -269,6 +280,8 @@ clocks = <&cpg CPG_MOD 927>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 927>; + dmas = <&dmac0 0x99>, <&dmac0 0x98>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -283,6 +296,8 @@ clocks = <&cpg CPG_MOD 919>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 919>; + dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -297,6 +312,8 @@ clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 918>; + dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; + dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; };