From patchwork Fri Jan 18 05:54:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Yang X-Patchwork-Id: 10769447 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B887A14E5 for ; Fri, 18 Jan 2019 05:55:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A811F2BF4A for ; Fri, 18 Jan 2019 05:55:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9C41C2E40E; Fri, 18 Jan 2019 05:55:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 490D82E55A for ; Fri, 18 Jan 2019 05:55:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727171AbfARFyy (ORCPT ); Fri, 18 Jan 2019 00:54:54 -0500 Received: from twhmllg3.macronix.com ([122.147.135.201]:18053 "EHLO TWHMLLG3.macronix.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727005AbfARFyy (ORCPT ); Fri, 18 Jan 2019 00:54:54 -0500 Received: from localhost.localdomain ([172.17.195.96]) by TWHMLLG3.macronix.com with ESMTP id x0I5sG8o033201; Fri, 18 Jan 2019 13:54:18 +0800 (GMT-8) (envelope-from masonccyang@mxic.com.tw) From: Mason Yang To: broonie@kernel.org, marek.vasut@gmail.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, bbrezillon@kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , sergei.shtylyov@cogentembedded.com Cc: juliensu@mxic.com.tw, Simon Horman , zhengxunli@mxic.com.tw, Mason Yang Subject: [PATCH v6 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Date: Fri, 18 Jan 2019 13:54:15 +0800 Message-Id: <1547790855-22120-3-git-send-email-masonccyang@mxic.com.tw> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1547790855-22120-1-git-send-email-masonccyang@mxic.com.tw> References: <1547790855-22120-1-git-send-email-masonccyang@mxic.com.tw> X-MAIL: TWHMLLG3.macronix.com x0I5sG8o033201 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. Signed-off-by: Mason Yang --- .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 0000000..9b5001e --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,37 @@ +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings +---------------------------------------------------------- + +Required properties: +- compatible: should be "renesas,rcar-gen3-rpc" +- #address-cells: should be 1 +- #size-cells: should be 0 +- reg: should contain three register areas: + first for the base address of rpc-if registers, + second for the direct mapping read mode and + third for the write buffer area. +- reg-names: should contain "regs", "dirmap" and "wbuf" +- clock-names: should contain "rpc" +- clocks: should contain 1 entries for the module's clock + +Example: + + rpc: rpc@ee200000 { + compatible = "renesas,rcar-gen3-rpc"; + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + clock-names = "rpc"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };