Message ID | 1554799912-24764-6-git-send-email-cv-dong@jinso.co.jp (mailing list archive) |
---|---|
State | Accepted |
Commit | 1631b58c7ef690869dcd4b853bf6d06ba54e74d0 |
Delegated to: | Simon Horman |
Headers | show |
Series | Add more support to the RZ/G1C (r8a77470) SoC | expand |
On Tue, Apr 09, 2019 at 05:51:46PM +0900, Cao Van Dong wrote: > Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. > > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> Thanks, This looks fine to me but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Hi Cao, On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote: > Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. > > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> > --- > arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi > index 3940a0d..e89c72f 100644 > --- a/arch/arm/boot/dts/r8a77470.dtsi > +++ b/arch/arm/boot/dts/r8a77470.dtsi > @@ -780,6 +780,28 @@ > status = "disabled"; > }; > > + vin0: video@e6ef0000 { > + compatible = "renesas,vin-r8a77470", > + "renesas,rcar-gen2-vin"; This patch looks good but you should also add renesas,vin-r8a77470 to Documentation/devicetree/bindings/media/rcar_vin.txt in a separate patch. Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > + reg = <0 0xe6ef0000 0 0x1000>; > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 811>; > + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > + resets = <&cpg 811>; > + status = "disabled"; > + }; > + > + vin1: video@e6ef1000 { > + compatible = "renesas,vin-r8a77470", > + "renesas,rcar-gen2-vin"; > + reg = <0 0xe6ef1000 0 0x1000>; > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 810>; > + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > + resets = <&cpg 810>; > + status = "disabled"; > + }; > + > sdhi0: sd@ee100000 { > compatible = "renesas,sdhi-r8a77470", > "renesas,rcar-gen2-sdhi"; > -- > 2.7.4 >
Dear Niklas-san, On 2019/04/09 22:01, Niklas Söderlund wrote: > Hi Cao, > > On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote: >> Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. >> >> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> >> --- >> arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi >> index 3940a0d..e89c72f 100644 >> --- a/arch/arm/boot/dts/r8a77470.dtsi >> +++ b/arch/arm/boot/dts/r8a77470.dtsi >> @@ -780,6 +780,28 @@ >> status = "disabled"; >> }; >> >> + vin0: video@e6ef0000 { >> + compatible = "renesas,vin-r8a77470", >> + "renesas,rcar-gen2-vin"; > This patch looks good but you should also add renesas,vin-r8a77470 to > Documentation/devicetree/bindings/media/rcar_vin.txt in a separate > patch. > > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Thanks for your feedback! I will create a separate patch in version 2. Thank you, Dong >> + reg = <0 0xe6ef0000 0 0x1000>; >> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&cpg CPG_MOD 811>; >> + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; >> + resets = <&cpg 811>; >> + status = "disabled"; >> + }; >> + >> + vin1: video@e6ef1000 { >> + compatible = "renesas,vin-r8a77470", >> + "renesas,rcar-gen2-vin"; >> + reg = <0 0xe6ef1000 0 0x1000>; >> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&cpg CPG_MOD 810>; >> + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; >> + resets = <&cpg 810>; >> + status = "disabled"; >> + }; >> + >> sdhi0: sd@ee100000 { >> compatible = "renesas,sdhi-r8a77470", >> "renesas,rcar-gen2-sdhi"; >> -- >> 2.7.4 >>
Hi Cao, > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi > > index 3940a0d..e89c72f 100644 > > --- a/arch/arm/boot/dts/r8a77470.dtsi > > +++ b/arch/arm/boot/dts/r8a77470.dtsi > > @@ -780,6 +780,28 @@ > > status = "disabled"; > > }; > > > > + vin0: video@e6ef0000 { > > + compatible = "renesas,vin-r8a77470", > > + "renesas,rcar-gen2-vin"; > > This patch looks good but you should also add renesas,vin-r8a77470 to > Documentation/devicetree/bindings/media/rcar_vin.txt in a separate > patch. Same for sound Documentation/devicetree/bindings/sound/renesas,rsnd.txt Thank you for your help !! Best regards --- Kuninori Morimoto
On Tue, Apr 09, 2019 at 03:01:38PM +0200, Niklas Söderlund wrote: > Hi Cao, > > On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote: > > Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. > > > > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> > > --- > > arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++ > > 1 file changed, 22 insertions(+) > > > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi > > index 3940a0d..e89c72f 100644 > > --- a/arch/arm/boot/dts/r8a77470.dtsi > > +++ b/arch/arm/boot/dts/r8a77470.dtsi > > @@ -780,6 +780,28 @@ > > status = "disabled"; > > }; > > > > + vin0: video@e6ef0000 { > > + compatible = "renesas,vin-r8a77470", > > + "renesas,rcar-gen2-vin"; > > This patch looks good but you should also add renesas,vin-r8a77470 to > Documentation/devicetree/bindings/media/rcar_vin.txt in a separate > patch. > > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Thanks, applied for inclusion in v5.2 with the changelog wrapped to 75 columns wide. > > > + reg = <0 0xe6ef0000 0 0x1000>; > > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 811>; > > + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > > + resets = <&cpg 811>; > > + status = "disabled"; > > + }; > > + > > + vin1: video@e6ef1000 { > > + compatible = "renesas,vin-r8a77470", > > + "renesas,rcar-gen2-vin"; > > + reg = <0 0xe6ef1000 0 0x1000>; > > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 810>; > > + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > > + resets = <&cpg 810>; > > + status = "disabled"; > > + }; > > + > > sdhi0: sd@ee100000 { > > compatible = "renesas,sdhi-r8a77470", > > "renesas,rcar-gen2-sdhi"; > > -- > > 2.7.4 > > > > -- > Regards, > Niklas Söderlund >
On Tue, Apr 9, 2019 at 10:52 AM Cao Van Dong <cv-dong@jinso.co.jp> wrote: > Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. > > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 3940a0d..e89c72f 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -780,6 +780,28 @@ status = "disabled"; }; + vin0: video@e6ef0000 { + compatible = "renesas,vin-r8a77470", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef0000 0 0x1000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 811>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 811>; + status = "disabled"; + }; + + vin1: video@e6ef1000 { + compatible = "renesas,vin-r8a77470", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef1000 0 0x1000>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 810>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 810>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi";
Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> --- arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)