| Message ID | 1562576868-8124-5-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | treewide: modify sh-pfc and add support pwm duty zero | expand |
Hi Shimoda-san, On Mon, Jul 8, 2019 at 11:08 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > The R-Car SoCs PWM Timer cannot output duty zero. So, this patch > adds a specific gpio property to output it. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt > @@ -26,6 +26,9 @@ Required Properties: > - pinctrl-0: phandle, referring to a default pin configuration node. > - pinctrl-names: Set to "default". > > +Optional properties: > +- renesas,duty-zero-gpios: Specify GPIO for outputting duty zero. > + > Example: R8A7743 (RZ/G1M) PWM Timer node > > pwm0: pwm@e6e30000 { I'm not so fond of adding a property to specify this explicitly: the PFC driver already knows the mapping from the PWM output pin to the GPIO number. However, I agree it is not easy to obtain this in a generic way. For a PWM block with a single pin, it's easy: the pin you want to switch between GPIO and pin function is the single pin in the single pin control group specified in the board DT. For blocks with multiple pins (e.g. SPI, UART), it is more complex, and depends on the granularity of the pin control groups. E.g. for UART, Renesas SoCs typically use 3 pin control groups ("data" for RXD/TXD, "ctrl" for RTS/CTS, and "clk" for clock), and the pin control driver (at least for sh-pfc) does not know which pin corresponds to which GPIO inside each group. Perhaps this information should be added, with an API to retrieve it? Anyone who has a good suggestion? Thanks! Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt index fbd6a4f..6acaaeb 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt @@ -26,6 +26,9 @@ Required Properties: - pinctrl-0: phandle, referring to a default pin configuration node. - pinctrl-names: Set to "default". +Optional properties: +- renesas,duty-zero-gpios: Specify GPIO for outputting duty zero. + Example: R8A7743 (RZ/G1M) PWM Timer node pwm0: pwm@e6e30000 {
The R-Car SoCs PWM Timer cannot output duty zero. So, this patch adds a specific gpio property to output it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 3 +++ 1 file changed, 3 insertions(+)