From patchwork Fri Jul 26 02:42:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Yang X-Patchwork-Id: 11060187 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9B419746 for ; Fri, 26 Jul 2019 02:57:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8CE7928A30 for ; Fri, 26 Jul 2019 02:57:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80B3928A34; Fri, 26 Jul 2019 02:57:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 31A0128A30 for ; Fri, 26 Jul 2019 02:57:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726001AbfGZC5R (ORCPT ); Thu, 25 Jul 2019 22:57:17 -0400 Received: from twhmllg4.macronix.com ([122.147.135.202]:11736 "EHLO TWHMLLG4.macronix.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725851AbfGZC5Q (ORCPT ); Thu, 25 Jul 2019 22:57:16 -0400 Received: from TWHMLLG4.macronix.com (localhost [127.0.0.2] (may be forged)) by TWHMLLG4.macronix.com with ESMTP id x6Q2IrYj096103 for ; Fri, 26 Jul 2019 10:18:53 +0800 (GMT-8) (envelope-from masonccyang@mxic.com.tw) Received: from localhost.localdomain ([172.17.195.96]) by TWHMLLG4.macronix.com with ESMTP id x6Q2Iasl095779; Fri, 26 Jul 2019 10:18:38 +0800 (GMT-8) (envelope-from masonccyang@mxic.com.tw) From: Mason Yang To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , devicetree@vger.kernel.org Cc: juliensu@mxic.com.tw, Simon Horman , lee.jones@linaro.org, sergei.shtylyov@cogentembedded.com, Mason Yang , marek.vasut@gmail.com, miquel.raynal@bootlin.com Subject: [PATCH v15 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Date: Fri, 26 Jul 2019 10:42:55 +0800 Message-Id: <1564108975-27423-3-git-send-email-masonccyang@mxic.com.tw> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1564108975-27423-1-git-send-email-masonccyang@mxic.com.tw> References: <1564108975-27423-1-git-send-email-masonccyang@mxic.com.tw> X-MAIL: TWHMLLG4.macronix.com x6Q2Iasl095779 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller. Signed-off-by: Mason Yang Reviewed-by: Rob Herring --- .../devicetree/bindings/spi/spi-renesas-rpc.txt | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 0000000..d929850 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,46 @@ +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings +--------------------------------------------------------- + +Required properties: +- compatible: should be an SoC-specific compatible value, followed by + "renesas,rcar-gen3-rpc" as a fallback. + supported SoC-specific values are: + "renesas,r8a77980-rpc" (R-Car V3H) + "renesas,r8a77995-rpc" (R-Car D3) +- reg: should contain three register areas: + first for the base address of RPC-IF registers, + second for the direct mapping read mode and + third for the write buffer area. +- reg-names: should contain "regs", "dirmap" and "wbuf" +- clocks: should contain the clock phandle/specifier pair for the module clock. +- clock-names: should contain "rpc" +- power-domains: should contain the power domain phandle/secifier pair. +- resets: should contain the reset controller phandle/specifier pair. +- #address-cells: should be 1 +- #size-cells: should be 0 +- flash: should be represented by a subnode of the RPC-IF node, + which "compatible" property contains "jedec,spi-nor", it presents + SPI is used. + +Example: + + rpc: spi@ee200000 { + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc"; + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };