From patchwork Mon Dec 16 20:12:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11295191 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9943F139A for ; Mon, 16 Dec 2019 20:13:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 77B042146E for ; Mon, 16 Dec 2019 20:13:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726776AbfLPUNS (ORCPT ); Mon, 16 Dec 2019 15:13:18 -0500 Received: from relmlor2.renesas.com ([210.160.252.172]:11422 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727329AbfLPUNR (ORCPT ); Mon, 16 Dec 2019 15:13:17 -0500 X-IronPort-AV: E=Sophos;i="5.69,322,1571670000"; d="scan'208";a="34356918" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 17 Dec 2019 05:13:16 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 5777940CAF00; Tue, 17 Dec 2019 05:13:11 +0900 (JST) From: Fabrizio Castro To: Laurent Pinchart , Geert Uytterhoeven , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Thierry Reding , Maarten Lankhorst , Maxime Ripard , Sean Paul , Andrzej Hajda Cc: Fabrizio Castro , Sam Ravnborg , Simon Horman , Magnus Damm , Kieran Bingham , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Jacopo Mondi , ebiharaml@si-linux.co.jp Subject: [PATCH v5 6/6] arm64: dts: renesas: Add EK874 board with idk-2121wr display support Date: Mon, 16 Dec 2019 20:12:34 +0000 Message-Id: <1576527154-18391-7-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576527154-18391-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1576527154-18391-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The EK874 is advertised as compatible with panel IDK-2121WR from Advantech, however the panel isn't sold alongside the board. A new dts, adding everything that's required to get the panel to to work with the EK874, is the most convenient way to support the EK874 when it's connected to the IDK-2121WR. Signed-off-by: Fabrizio Castro Acked-by: Laurent Pinchart --- Hi Geert, I think it is now safe for you to have a look at this patch. Thanks, Fab v4->v5: * no change v3->v4: * no change v2->v3: * removed renesas,swap-data property * added dual-lvds-odd-pixels and dual-lvds-even-pixels properties v1->v2: * Added comment for lvds-connector-en-gpio * Renamed &lvds0_panel_in to panel_in0 * Renamed &lvds1_panel_in to panel_in1 --- arch/arm64/boot/dts/renesas/Makefile | 3 +- .../boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts | 116 +++++++++++++++++++++ 2 files changed, 118 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index d4cc332..ab2c799 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -3,7 +3,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb -dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb +dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \ + r8a774c0-ek874-idk-2121wr.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts new file mode 100644 index 0000000..a7b27d0 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874), + * connected to an Advantech IDK-2121WR 21.5" LVDS panel + * + * Copyright (C) 2019 Renesas Electronics Corp. + */ + +#include "r8a774c0-ek874.dts" + +/ { + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm5 0 50000>; + + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + + power-supply = <®_12p0v>; + enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + + panel-lvds { + compatible = "advantech,idk-2121wr", "panel-lvds"; + + width-mm = <476>; + height-mm = <268>; + + data-mapping = "vesa-24"; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hsync-len = <44>; + hfront-porch = <88>; + hback-porch = <148>; + vfront-porch = <4>; + vback-porch = <36>; + vsync-len = <5>; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + panel_in0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + panel_in1: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + }; + }; +}; + +&gpio0 { + /* + * When GP0_17 is low LVDS[01] are connected to the LVDS connector + * When GP0_17 is high LVDS[01] are connected to the LT8918L + */ + lvds-connector-en-gpio{ + gpio-hog; + gpios = <17 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "lvds-connector-en-gpio"; + }; +}; + +&lvds0 { + ports { + port@1 { + lvds0_out: endpoint { + remote-endpoint = <&panel_in0>; + }; + }; + }; +}; + +&lvds1 { + status = "okay"; + + clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; + clock-names = "fck", "dclkin.0", "extal"; + + ports { + port@1 { + lvds1_out: endpoint { + remote-endpoint = <&panel_in1>; + }; + }; + }; +}; + +&pfc { + pwm5_pins: pwm5 { + groups = "pwm5_a"; + function = "pwm5"; + }; +}; + +&pwm5 { + pinctrl-0 = <&pwm5_pins>; + pinctrl-names = "default"; + + status = "okay"; +};