| Message ID | 15cc7a7522b1658327a2bd0c4990d0131bbcb4d7.1718890849.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | c40359d35ac46a96799cae589044a00c68292b77 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | dts: renesas: Add missing hypervisor virtual timer IRQs and interrupt-names | expand |
On Thu, Jun 20, 2024 at 3:03 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote: > > Add the missing fifth interrupt to the device node that represents the > ARM architected timer. While at it, add an interrupt-names property for > clarity, > > Fixes: cf40c9689e5109bf ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Cheers, Prabhakar > diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > index 165bfcfef3bcc69c..18ef297db9336362 100644 > --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > @@ -50,7 +50,10 @@ timer { > interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; > + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", > + "hyp-virt"; > }; > }; > > -- > 2.34.1 > >
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 165bfcfef3bcc69c..18ef297db9336362 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -50,7 +50,10 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; };
Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: cf40c9689e5109bf ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)