| Message ID | 1627631.X1bJtVQHBF@wasted.cogentembedded.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8fd763c75c3ab8e72e5d7f0d4c53531e6ff76197 |
| Delegated to: | Simon Horman |
| Headers | show |
On Tue, Jun 21, 2016 at 12:31 AM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Add the device tree nodes for the Advanced Power Management Unit (APMU) > and the second Cortex-A15 CPU core. > Use the "enable-method" prop to point out that the APMU should be used > for the SMP support. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hello. On 06/21/2016 01:31 AM, Sergei Shtylyov wrote: > Add the device tree nodes for the Advanced Power Management Unit (APMU) > and the second Cortex-A15 CPU core. > Use the "enable-method" prop to point out that the APMU should be used > for the SMP support. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > This patch is against the 'renesas-devel-20160620-v4.7-rc4' tag of Simon > Horman's 'renesas.git' repo. It depends on Magnus'/Geert's SMP patchset... simon, now that this patchset has been merged (for 4.8?), could you also merge this patch? MBR, Sergei
On Wed, Jun 29, 2016 at 07:46:33PM +0300, Sergei Shtylyov wrote: > Hello. > > On 06/21/2016 01:31 AM, Sergei Shtylyov wrote: > > >Add the device tree nodes for the Advanced Power Management Unit (APMU) > >and the second Cortex-A15 CPU core. > >Use the "enable-method" prop to point out that the APMU should be used > >for the SMP support. > > > >Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > > >--- > >This patch is against the 'renesas-devel-20160620-v4.7-rc4' tag of Simon > >Horman's 'renesas.git' repo. It depends on Magnus'/Geert's SMP patchset... > > simon, now that this patchset has been merged (for 4.8?), could you also > merge this patch? Sure, as this is for a new board I'll make a last minute exception and take this. I am trusting that cpu hotplug and suspend/resume have been adequately tested.
On 06/30/2016 03:27 PM, Simon Horman wrote: >>> Add the device tree nodes for the Advanced Power Management Unit (APMU) >>> and the second Cortex-A15 CPU core. >>> Use the "enable-method" prop to point out that the APMU should be used >>> for the SMP support. >>> >>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> >>> >>> --- >>> This patch is against the 'renesas-devel-20160620-v4.7-rc4' tag of Simon >>> Horman's 'renesas.git' repo. It depends on Magnus'/Geert's SMP patchset... >> >> simon, now that this patchset has been merged (for 4.8?), could you also >> merge this patch? > > Sure, as this is for a new board I'll make a last minute exception and take > this. Thank you! :-) > I am trusting that cpu hotplug and suspend/resume have been adequately > tested. Don't worry, all tests suggested by you have passed on this board. Only the R8A7794/SILK board had trouble with hot-unplugging CPU0... MBR, Sergei
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -21,6 +21,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -32,6 +33,15 @@ next-level-cache = <&L2_CA15>; }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1000000000>; + power-domains = <&sysc R8A7792_PD_CA15_CPU1>; + next-level-cache = <&L2_CA15>; + }; + L2_CA15: cache-controller@0 { compatible = "cache"; reg = <0>; @@ -49,6 +59,12 @@ #size-cells = <2>; ranges; + apmu@e6152000 { + compatible = "renesas,r8a7792-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;
Add the device tree nodes for the Advanced Power Management Unit (APMU) and the second Cortex-A15 CPU core. Use the "enable-method" prop to point out that the APMU should be used for the SMP support. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- This patch is against the 'renesas-devel-20160620-v4.7-rc4' tag of Simon Horman's 'renesas.git' repo. It depends on Magnus'/Geert's SMP patchset... arch/arm/boot/dts/r8a7792.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)