From patchwork Thu Mar 17 16:30:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 8613131 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 99042C0553 for ; Thu, 17 Mar 2016 16:27:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F399F2026F for ; Thu, 17 Mar 2016 16:27:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4F78B2026C for ; Thu, 17 Mar 2016 16:27:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030587AbcCQQ1P (ORCPT ); Thu, 17 Mar 2016 12:27:15 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:33183 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936285AbcCQQ1K (ORCPT ); Thu, 17 Mar 2016 12:27:10 -0400 Received: by mail-pf0-f173.google.com with SMTP id 124so127597093pfg.0; Thu, 17 Mar 2016 09:27:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=Dylv3uW04Wk/cMP+8oF4HE3bIlrkPZA1Phpo7GHBANU=; b=ZhrLaMGgjjnOWJXqrC3bZmzmfTNLFDCIcf4IFLo7+L0ASlBftCNM520c+LMU1vNNSx E8tv6etaLtWJJNY2JzuYT1ddEDEM1D4Uay3kilTlmCIXiJcxsuWSJQoivL8jZ0jmgH4a 1WNUP194BuOm2gdN/yxSzpwneBIqkWIzKE/TdHNIBUPhBh1t/buTBdyJgwGw2OO0ccpS JxjyYP2XlbfBJ2KYHuJmxJB8E+tpLW0I2W0p1X2V0O68exeTB+WlAMKdmz+RtAvpN696 AiqIyl9RWigbP+CHvHminumkX+e20RCJ7pnWq5JCDEm/gT6cfOGosunuw20HBPq5VFAm wOLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:date:message-id:in-reply-to :references:subject; bh=Dylv3uW04Wk/cMP+8oF4HE3bIlrkPZA1Phpo7GHBANU=; b=XYRqLP9jg392yWvFVT8aIJUrdKXWL8z9Eki/8esS3DH/S2RDEmxbZujSX4+XWRTRbG McCiHVW8tcuXMiQIbndOWG4pn2Mbb3y60MKqPzve9b8n3IEUlVgsbjyDOc4XV3l0KHfY iCzTMqxaR6ClI7xu9WKyU/TaIwtv8jE2EXntaKrr8Los7lIGSQTdAL8ZNEx1tZWYG9Ep UfvEw8y0++xzStvJ/rfPsm8Nlcp0hDnhr2PxutPPfh4jKSH6P4vhAqNi+v17KPZ2A8k2 dZWu3wHL+Fv6jcsoKM3emjKy90zbyR5BwnIJUGUC/YYhqS/HA+6y3scpydjc45sxC7OY fweg== X-Gm-Message-State: AD7BkJKsRVDipw9ZMQP5Ncnd1/RFtsbefsG9+3mNvglkrgsKFcdKjkB1Azr0z+aqJEKJHw== X-Received: by 10.66.63.104 with SMTP id f8mr16218567pas.109.1458232030031; Thu, 17 Mar 2016 09:27:10 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id sj4sm14488346pab.43.2016.03.17.09.27.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 Mar 2016 09:27:08 -0700 (PDT) From: Magnus Damm To: iommu@lists.linux-foundation.org Cc: laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, joro@8bytes.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au, Magnus Damm Date: Fri, 18 Mar 2016 01:30:32 +0900 Message-Id: <20160317163032.24104.7820.sendpatchset@little-apple> In-Reply-To: <20160317162909.24104.31682.sendpatchset@little-apple> References: <20160317162909.24104.31682.sendpatchset@little-apple> Subject: [PATCH 09/10] iommu/ipmmu-vmsa: Allow two bit SL0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Introduce support for two bit SL0 bitfield in IMTTBCR by using a separate feature flag. Signed-off-by: Magnus Damm --- drivers/iommu/ipmmu-vmsa.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) --- 0025/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-18 00:33:36.500513000 +0900 @@ -37,6 +37,7 @@ struct ipmmu_features { bool use_ns_alias_offset; bool has_cache_leaf_nodes; bool setup_imbuscr; + bool twobit_imttbcr_sl0; }; struct ipmmu_vmsa_device { @@ -141,6 +142,10 @@ static struct ipmmu_vmsa_domain *to_vmsa #define IMTTBCR_TSZ0_MASK (7 << 0) #define IMTTBCR_TSZ0_SHIFT O +#define IMTTBCR_SL0_TWOBIT_LVL_3 (0 << 6) +#define IMTTBCR_SL0_TWOBIT_LVL_2 (1 << 6) +#define IMTTBCR_SL0_TWOBIT_LVL_1 (2 << 6) + #define IMBUSCR 0x000c #define IMBUSCR_DVM (1 << 2) #define IMBUSCR_BUSSEL_SYS (0 << 0) @@ -356,6 +361,7 @@ static struct iommu_gather_ops ipmmu_gat static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { u64 ttbr; + u32 tmp; int ret; /* @@ -408,9 +414,15 @@ static int ipmmu_domain_init_context(str * We use long descriptors with inner-shareable WBWA tables and allocate * the whole 32-bit VA space to TTBR0. */ + + if (domain->root->features->twobit_imttbcr_sl0) + tmp = IMTTBCR_SL0_TWOBIT_LVL_1; + else + tmp = IMTTBCR_SL0_LVL_1; + ipmmu_ctx_write(domain, IMTTBCR, IMTTBCR_EAE | IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA | - IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1); + IMTTBCR_IRGN0_WB_WA | tmp); /* MAIR0 */ ipmmu_ctx_write(domain, IMMAIR0, domain->cfg.arm_lpae_s1_cfg.mair[0]); @@ -994,6 +1006,7 @@ static const struct ipmmu_features ipmmu .use_ns_alias_offset = true, .has_cache_leaf_nodes = false, .setup_imbuscr = true, + .twobit_imttbcr_sl0 = false, }; static const struct of_device_id ipmmu_of_ids[] = {