From patchwork Thu Jan 12 01:03:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 9511699 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 237D260573 for ; Thu, 12 Jan 2017 01:04:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10D4428681 for ; Thu, 12 Jan 2017 01:04:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 02D9528699; Thu, 12 Jan 2017 01:04:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1060628681 for ; Thu, 12 Jan 2017 01:04:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933483AbdALBDz (ORCPT ); Wed, 11 Jan 2017 20:03:55 -0500 Received: from mail-oi0-f67.google.com ([209.85.218.67]:32848 "EHLO mail-oi0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755420AbdALBDy (ORCPT ); Wed, 11 Jan 2017 20:03:54 -0500 Received: by mail-oi0-f67.google.com with SMTP id j15so765023oih.0; Wed, 11 Jan 2017 17:03:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=MKhbEcDu1LweqK9lDK4bYRlLhCGjI7WU+8fUA5QN67c=; b=ag9SwoK/wxsEK4HW8M4JkABNsvLsRXOn3WtnrRwqMa/rYJ8d9r8IpWyBR7rOlR2QYy JW56h7HnH47AJQI5PSL54r4Q/lTDsKySoTQouNE+NdpadHteUgGshINiyzxMNeIo0bKX JDJiS1oE6WDIBtzkNIn7BTUfLjWiM4Xs3smPqB/aXhjeF3XDtmrueDbEprblY4Sx0eP/ ID8feEN0uZpo8wssV3AjrrFqa/42TysqXk2yel8WxI7UYUt2SduN9J9iaPxwunqnto7N ITs/9sh+vpOKBT9If4US2j8jUEZ8EeUPUgh7acn9DLOCQCzpShabPVYdH+ZpIchE5UEi qXBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=MKhbEcDu1LweqK9lDK4bYRlLhCGjI7WU+8fUA5QN67c=; b=HoBPsg4U0XWc+vF9/Gsyk8rvk4aoKX62vYqFf3FLcL3Xf2rUWEqC3OvQ3c2f4lvksv EmBCQkVezER7Jhheb/PdRZmY5NK4hIeR2yUtbRVivOKD6ASQJ7JLarHRNdzzLO08TzDx 5cAnANkz4QOanEyrtJOU1XSoI0BS14RNqTrOKWhU4LkW8WYWsIdZR4oHI+P6LD23G7Vn 5DA5W9b8lOLzitXupNq6SlHxFYgIkfE7PfOL+JNJQZgJuFcP3AYtm28xj0uLTu0o/3oa EiuifgIYrEPCSpif3acUpT3NRsB4zzPUeq8hS+Gj0MVUrSQRpwPm9E3GArhr3x84NMqa mD2g== X-Gm-Message-State: AIkVDXKw2yyeGa6/np/tT48wUxYmNrZRos4Bu3VMmO0cs/zVr0k0n8lh1Griy8RJC+uvFg== X-Received: by 10.202.72.23 with SMTP id v23mr2980293oia.116.1484183033112; Wed, 11 Jan 2017 17:03:53 -0800 (PST) Received: from kurokawa.lan ([195.140.253.167]) by smtp.gmail.com with ESMTPSA id r84sm3349056oie.24.2017.01.11.17.03.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Jan 2017 17:03:52 -0800 (PST) From: Marek Vasut To: linux-clk@vger.kernel.org Cc: Marek Vasut , Michael Turquette , Stephen Boyd , Laurent Pinchart , Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH V2 1/2] clk: vc5: Add bindings for IDT VersaClock 5P49V5923 and 5P49V5933 Date: Thu, 12 Jan 2017 02:03:23 +0100 Message-Id: <20170112010324.28068-1-marek.vasut@gmail.com> X-Mailer: git-send-email 2.11.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add bindings for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These are I2C clock generators with optional clock source from either XTal or dedicated clock generator and, depending on the model, two or more clock outputs. Signed-off-by: Marek Vasut Cc: Michael Turquette Cc: Stephen Boyd Cc: Laurent Pinchart Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- V2: Add mapping between the clock specifier and physical pins of the chip --- .../devicetree/bindings/clock/idt,versaclock5.txt | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/idt,versaclock5.txt diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt new file mode 100644 index 000000000000..87e9c47a89a3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt @@ -0,0 +1,65 @@ +Binding for IDT VersaClock5 programmable i2c clock generator. + +The IDT VersaClock5 are programmable i2c clock generators providing +from 3 to 12 output clocks. + +==I2C device node== + +Required properties: +- compatible: shall be one of "idt,5p49v5923" , "idt,5p49v5933". +- reg: i2c device address, shall be 0x68 or 0x6a. +- #clock-cells: from common clock binding; shall be set to 1. +- clocks: from common clock binding; list of parent clock handles, + - 5p49v5923: (required) either or both of XTAL or CLKIN + reference clock. + - 5p49v5933: (optional) property not present (internal + Xtal used) or CLKIN reference + clock. +- clock-names: from common clock binding; clock input names, can be + - 5p49v5923: (required) either or both of "xin", "clkin". + - 5p49v5933: (optional) property not present or "clkin". + +==Mapping between clock specifier and physical pins== + +When referencing the provided clock in the DT using phandle and +clock specifier, the following mapping applies: + +5P49V5923: + 0 -- OUT0_SEL_I2CB + 1 -- OUT1 + 2 -- OUT2 + +5P49V5933: + 0 -- OUT0_SEL_I2CB + 1 -- OUT1 + 2 -- OUT4 + +==Example== + +/* 25MHz reference crystal */ +ref25: ref25m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; +}; + +i2c-master-node { + + /* IDT 5P49V5923 i2c clock generator */ + vc5: clock-generator@6a { + compatible = "idt,5p49v5923"; + reg = <0x6a>; + #clock-cells = <1>; + + /* Connect XIN input to 25MHz reference */ + clocks = <&ref25m>; + clock-names = "xin"; + }; +}; + +/* Consumer referencing the 5P49V5923 pin OUT1 */ +consumer { + ... + clocks = <&vc5 1>; + ... +}