From patchwork Mon Feb 13 18:25:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 9570577 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8DE8E60572 for ; Mon, 13 Feb 2017 18:26:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7FE1E271FD for ; Mon, 13 Feb 2017 18:26:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 74DC62793A; Mon, 13 Feb 2017 18:26:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1858427D4D for ; Mon, 13 Feb 2017 18:26:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752134AbdBMS0J (ORCPT ); Mon, 13 Feb 2017 13:26:09 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:46618 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752144AbdBMS0I (ORCPT ); Mon, 13 Feb 2017 13:26:08 -0500 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie4.idc.renesas.com with ESMTP; 14 Feb 2017 03:26:05 +0900 Received: from relmlac4.idc.renesas.com (relmlac4.idc.renesas.com [10.200.69.24]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id 2798B492F5; Tue, 14 Feb 2017 03:26:05 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 157C4480A5; Tue, 14 Feb 2017 03:26:05 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id 05B2F48014; Tue, 14 Feb 2017 03:26:05 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac4.idc.renesas.com with ESMTP id DAN14835; Tue, 14 Feb 2017 03:26:05 +0900 X-IronPort-AV: E=Sophos;i="5.35,156,1483974000"; d="scan'208";a="234411206" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii2.idc.renesas.com with ESMTP; 14 Feb 2017 03:26:03 +0900 Received: from localhost.localdomain (unknown [172.27.49.108]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 97CC23CC; Mon, 13 Feb 2017 18:25:59 +0000 (UTC) From: Chris Brandt To: Sebastian Reichel , Rob Herring , Mark Rutland , Simon Horman Cc: linux-renesas-soc@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Chris Brandt Subject: [PATCH 1/3] power: reset: Add Renesas reset driver Date: Mon, 13 Feb 2017 13:25:30 -0500 Message-Id: <20170213182532.4042-2-chris.brandt@renesas.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170213182532.4042-1-chris.brandt@renesas.com> References: <20170213182532.4042-1-chris.brandt@renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some Renesas SoCs do not have a reset register and the only way to do a SW controlled reset is to use the watchdog timer. Additionally, since all the WDT timeout options are so quick, a system reset is about the only thing it's good for. Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven --- drivers/power/reset/Kconfig | 9 ++++ drivers/power/reset/Makefile | 1 + drivers/power/reset/renesas-reset.c | 103 ++++++++++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 drivers/power/reset/renesas-reset.c diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index b8caccc..e3100c9 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -130,6 +130,15 @@ config POWER_RESET_QNAP Say Y if you have a QNAP NAS. +config POWER_RESET_RENESAS + tristate "Renesas WDT reset driver" + depends on ARCH_RENESAS || COMPILE_TEST + depends on HAS_IOMEM + help + Reboot support for Renesas SoCs with WDT reset. + Some Renesas SoCs do not have a reset register and the only way + to do a SW controlled reset is to use the watchdog timer. + config POWER_RESET_RESTART bool "Restart power-off driver" help diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index 11dae3b..a78a56c 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o +obj-$(CONFIG_POWER_RESET_RENESAS) += renesas-reset.o obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o obj-$(CONFIG_POWER_RESET_VERSATILE) += arm-versatile-reboot.o diff --git a/drivers/power/reset/renesas-reset.c b/drivers/power/reset/renesas-reset.c new file mode 100644 index 0000000..dede029 --- /dev/null +++ b/drivers/power/reset/renesas-reset.c @@ -0,0 +1,103 @@ +/* + * Renesas WDT Reset Driver + * + * Copyright (C) 2017 Renesas Electronics America, Inc. + * Copyright (C) 2017 Chris Brandt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * based on rmobile-reset.c + * + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Watchdog Timer Registers */ +#define WTCSR 0 +#define WTCNT 2 +#define WRCSR 4 + +static void __iomem *base; + +static int wdt_reset_handler(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + pr_debug("%s %lu\n", __func__, mode); + + /* Dummy read (must read WRCSR:WOVF at least once before clearing) */ + readw(base + WRCSR); + + writew(0xA500, base + WRCSR); /* Clear WOVF */ + writew(0x5A5F, base + WRCSR); /* Reset Enable */ + writew(0x5A00, base + WTCNT); /* Counter to 00 */ + writew(0xA578, base + WTCSR); /* Start timer */ + + /* Wait for WDT overflow */ + while (1) + ; + + return NOTIFY_DONE; +} + +static struct notifier_block wdt_reset_nb = { + .notifier_call = wdt_reset_handler, + .priority = 192, +}; + +static int wdt_reset_probe(struct platform_device *pdev) +{ + int error; + + base = of_iomap(pdev->dev.of_node, 0); + if (!base) + return -ENODEV; + + error = register_restart_handler(&wdt_reset_nb); + if (error) { + dev_err(&pdev->dev, + "cannot register restart handler (err=%d)\n", error); + goto fail_unmap; + } + + return 0; + +fail_unmap: + iounmap(base); + return error; +} + +static int wdt_reset_remove(struct platform_device *pdev) +{ + unregister_restart_handler(&wdt_reset_nb); + iounmap(base); + return 0; +} + +static const struct of_device_id wdt_reset_of_match[] = { + { .compatible = "renesas,wdt-reset", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, wdt_reset_of_match); + +static struct platform_driver wdt_reset_driver = { + .probe = wdt_reset_probe, + .remove = wdt_reset_remove, + .driver = { + .name = "wdt_reset", + .of_match_table = wdt_reset_of_match, + }, +}; + +module_platform_driver(wdt_reset_driver); + +MODULE_DESCRIPTION("Renesas WDT Reset Driver"); +MODULE_AUTHOR("Chris Brandt "); +MODULE_LICENSE("GPL v2");