From patchwork Thu Jan 1 00:00:01 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9637543 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EE3EB60328 for ; Tue, 21 Mar 2017 19:49:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DFB13275A2 for ; Tue, 21 Mar 2017 19:49:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D49292840E; Tue, 21 Mar 2017 19:49:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=2.0 tests=BAYES_00, DATE_IN_PAST_96_XX, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68DA82830A for ; Tue, 21 Mar 2017 19:49:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755969AbdCUTs5 (ORCPT ); Tue, 21 Mar 2017 15:48:57 -0400 Received: from mail-lf0-f49.google.com ([209.85.215.49]:35521 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757195AbdCUTsc (ORCPT ); Tue, 21 Mar 2017 15:48:32 -0400 Received: by mail-lf0-f49.google.com with SMTP id j90so71189095lfk.2 for ; Tue, 21 Mar 2017 12:48:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:message-id:user-agent:date:to:cc:subject:mime-version :content-disposition; bh=y2JWDcXbetnI0qYJHz55XO6HlCu5kNGvDjW/WJhKDWM=; b=rrbmN7sI0QNu4RNpOxuy2ifqRbAkPOnTDcvX3MS9vB6jdoarN4/WAs+C/D6LUdcAGH QWkpWB129CWsSOLWzH+3DOvJF7SsKrdWmTpfc4BWVAbBKPhMDw+JutMgHYJRjSEnzLFP F2ZHmMQkaamYmh+uILCCBYSyl8cvufBcNlXYvuqhTCYiTNWNUk27QZHxv093JCgD+Riy oMTWB+o4quQygF+aFRymeBreKVM7PRn7765s+eiQFh+J1UeRz3vl5BnsrCP7+PIQQ7to qfOEdo+lexa/8Jl1ZqTwZdWR/AV+gabpaPOchppq/GjuKREwqWPE/dtnnRILQPWZo88M M3FA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:message-id:user-agent:date:to:cc:subject :mime-version:content-disposition; bh=y2JWDcXbetnI0qYJHz55XO6HlCu5kNGvDjW/WJhKDWM=; b=p/ZnPAqrbNr8FDlkmNzZoG/LIWYTj2jwP07fpkWzY28skFeE6oTjg0jr8xMdUpVK0h pz+rx77yQKEy5PlknWu9H85vlKTHCXCrEa0Ux8Ccgj8ULdKB0x3FLuexls/Y7R8dLkyE +j/l5UOh2a+MFB0YyaFbxWt1kdxYR+DsOyABSmJV+O+FBd9UD8LrmUoYwJ13jl2kPw9h ZU6te1aO+O5sWNHYH8ir+sE7LP75rND8d5ijahgBu32cMiAJkwvnxcy2Bena0PQGZxV4 qgHFVXXDByv92IW9R202gOnZ7f9tQ7Ja50k7fqbWFIZOrGl3osu9ekxyu3G+LlWhn2LC e2dg== X-Gm-Message-State: AFeK/H0ipgidqjhEkgwwd9clZhS7npIcVqCYAy77mpeJh2DZYH/+M/1Sfky5DTCRciq+SQ== X-Received: by 10.46.88.7 with SMTP id m7mr12340213ljb.131.1490125710525; Tue, 21 Mar 2017 12:48:30 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.83.95]) by smtp.gmail.com with ESMTPSA id x84sm3685324lfa.13.2017.03.21.12.48.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Mar 2017 12:48:29 -0700 (PDT) From: Sergei Shtylyov X-Google-Original-From: "Sergei Shtylyov" Received: by wasted.cogentembedded.com (sSMTP sendmail emulation); Tue, 21 Mar 2017 22:48:20 +0300 Message-Id: <20170321194820.477663240@cogentembedded.com> User-Agent: quilt/0.64 Date: Thu, 01 Jan 1970 03:00:01 +0300 To: Simon Horman , Rob Herring , Mark Rutland , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: Magnus Damm , Russell King , linux-arm-kernel@lists.infradead.org, Sergei Shtylyov Subject: [PATCH 1/2] ARM: dts: r8a7792: add IMR-L[S]X3 clocks MIME-Version: 1.0 Content-Disposition: inline; filename=ARM-dts-r8a7792-add-IMR-L-S-X3-clocks.patch Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the IMR-L[S]X3 clocks to the R8A7792 device tree. Based on the original patch by Roman Meshkevich . Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7792.dtsi | 15 ++++++++++++--- include/dt-bindings/clock/r8a7792-clock.h | 7 +++++++ 2 files changed, 19 insertions(+), 3 deletions(-) Index: renesas/arch/arm/boot/dts/r8a7792.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -927,16 +927,25 @@ "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, - <&zg_clk>, <&zg_clk>, <&hp_clk>; + <&zg_clk>, <&zg_clk>, <&hp_clk>, <&zg_clk>, + <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, + <&zg_clk>, <&zg_clk>; #clock-cells = <1>; clock-indices = < R8A7792_CLK_VIN5 R8A7792_CLK_VIN4 R8A7792_CLK_VIN3 R8A7792_CLK_VIN2 R8A7792_CLK_VIN1 R8A7792_CLK_VIN0 - R8A7792_CLK_ETHERAVB + R8A7792_CLK_ETHERAVB R8A7792_CLK_IMR_LX3 + R8A7792_CLK_IMR_LSX3_1 R8A7792_CLK_IMR_LSX3_0 + R8A7792_CLK_IMR_LSX3_5 R8A7792_CLK_IMR_LSX3_4 + R8A7792_CLK_IMR_LSX3_3 R8A7792_CLK_IMR_LSX3_2 >; clock-output-names = "vin5", "vin4", "vin3", "vin2", - "vin1", "vin0", "etheravb"; + "vin1", "vin0", + "etheravb", "imr-lx3", + "imr-lsx3-1", "imr-lsx3-0", + "imr-lsx3-5", "imr-lsx3-4", + "imr-lsx3-3", "imr-lsx3-2"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7792-mstp-clocks", Index: renesas/include/dt-bindings/clock/r8a7792-clock.h =================================================================== --- renesas.orig/include/dt-bindings/clock/r8a7792-clock.h +++ renesas/include/dt-bindings/clock/r8a7792-clock.h @@ -70,6 +70,13 @@ #define R8A7792_CLK_VIN1 10 #define R8A7792_CLK_VIN0 11 #define R8A7792_CLK_ETHERAVB 12 +#define R8A7792_CLK_IMR_LX3 21 +#define R8A7792_CLK_IMR_LSX3_1 22 +#define R8A7792_CLK_IMR_LSX3_0 23 +#define R8A7792_CLK_IMR_LSX3_5 25 +#define R8A7792_CLK_IMR_LSX3_4 26 +#define R8A7792_CLK_IMR_LSX3_3 27 +#define R8A7792_CLK_IMR_LSX3_2 28 /* MSTP9 */ #define R8A7792_CLK_GPIO7 4