From patchwork Sun Apr 16 18:08:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 9683071 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3C82E60138 for ; Sun, 16 Apr 2017 18:09:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3238F279E0 for ; Sun, 16 Apr 2017 18:09:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2705A27F07; Sun, 16 Apr 2017 18:09:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7216127F10 for ; Sun, 16 Apr 2017 18:08:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756636AbdDPSI5 (ORCPT ); Sun, 16 Apr 2017 14:08:57 -0400 Received: from mail-oi0-f66.google.com ([209.85.218.66]:35927 "EHLO mail-oi0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756607AbdDPSIe (ORCPT ); Sun, 16 Apr 2017 14:08:34 -0400 Received: by mail-oi0-f66.google.com with SMTP id b187so24591940oif.3; Sun, 16 Apr 2017 11:08:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+rj6CYhVDnfePdA+uK2dGjFo1WJIfl5vCEts582drEM=; b=dtUntLt16XcTkjX/lNHbGN1GylRWGrsJW5L5yEaX1aeob86Bk3E5REcto6TCRH6j0d qNtcBHEbyTvzp/V7EuVGEduoBzk3tZMikBPpvjMpGs+RwIZiu0N/yvVdgyA4PMqpMrZ0 RV0Q+9pQkmTZ9uIWUhfTmV7mqI5nSIRSSd0se6szo07oqciznp/eUS0IPnnu1pvzloV4 9zP+SB36pGwHTs/2NVDCPJOYTIUt9PUIY5iFi7k/KuwEgbmIt/IcqJnUfbFF4WoTm63b eLpTgqjxkxaAIhWWuUZ1ymlF8suMRz5KqyqXwx5DngGQGhAgQI8ZQ0BkwzRCo4RZrI+V troQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+rj6CYhVDnfePdA+uK2dGjFo1WJIfl5vCEts582drEM=; b=lLphvsrb4oMoy0wckaeu0zGc7P84J0FGaCh3pFOB51DkHBBBunK5a69YSvMa0yZpCW YBvNGr+YimC3nbibkCM8gqf2TEkSY6mK+Qry9QKCF/vGlZvU5VIjMSVpgUVVTF185m+K 57ONXJH28xzGS0ImNynm4DYGczeTyfv8nYRDgQWh7ftqiTl3uCCWB/LqxZTPTB5ER+g3 lGlXSLeIfe17GKoNvsYBfP+R4C9VlZZ3Gyki29IxP2LMnxURG/dXabe3nj458uCa8irr lJG7ckOwGbmuL5tKKLonVchxmvq/+xvYOvBHSjn4ivJPlM6l1lMnDilDwKfS6YKyVe82 K+9A== X-Gm-Message-State: AN3rC/7bCZGZEzLop4ajhsnd0MnuQ5j8cOxHipPJisB/Lm26WU5QBOb8 PT/jycMC5+WSUg== X-Received: by 10.202.117.84 with SMTP id q81mr1756790oic.188.1492366113163; Sun, 16 Apr 2017 11:08:33 -0700 (PDT) Received: from kurokawa.lan ([195.140.253.167]) by smtp.gmail.com with ESMTPSA id d198sm125694oig.20.2017.04.16.11.08.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 16 Apr 2017 11:08:32 -0700 (PDT) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-renesas-soc@vger.kernel.org Cc: Marek Vasut , linux-gpio@vger.kernel.org, Geert Uytterhoeven , Linus Walleij Subject: [PATCH 3/4] gpio: Add ROHM BD9571MWV-M PMIC GPIO driver Date: Sun, 16 Apr 2017 20:08:00 +0200 Message-Id: <20170416180801.17828-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170416180801.17828-1-marek.vasut+renesas@gmail.com> References: <20170416180801.17828-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC. This block is pretty trivial and supports setting GPIO direction as Input/Output and in case of Output, supports setting value. Signed-off-by: Marek Vasut Cc: linux-gpio@vger.kernel.org Cc: Geert Uytterhoeven Cc: Linus Walleij Reviewed-by: Linus Walleij --- drivers/gpio/Kconfig | 11 ++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-bd9571mwv.c | 144 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 156 insertions(+) create mode 100644 drivers/gpio/gpio-bd9571mwv.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 63ceed246b6f..62f810a8663c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -844,6 +844,17 @@ config GPIO_ARIZONA help Support for GPIOs on Wolfson Arizona class devices. +config GPIO_BD9571MWV + tristate "ROHM BD9571 GPIO support" + depends on MFD_BD9571MWV + help + Support for GPIOs on ROHM BD9571 PMIC. There are two GPIOs + available on the ROHM PMIC in total, both of which can also + generate interrupts. + + This driver can also be built as a module. If so, the module + will be called gpio-bd9571mwv. + config GPIO_CRYSTAL_COVE tristate "GPIO support for Crystal Cove PMIC" depends on (X86 || COMPILE_TEST) && INTEL_SOC_PMIC diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 095598e856ca..68b96277d9fa 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o +obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o diff --git a/drivers/gpio/gpio-bd9571mwv.c b/drivers/gpio/gpio-bd9571mwv.c new file mode 100644 index 000000000000..8495f25c735a --- /dev/null +++ b/drivers/gpio/gpio-bd9571mwv.c @@ -0,0 +1,144 @@ +/* + * ROHM BD9571MWV-M GPIO driver + * + * Copyright (C) 2017 Marek Vasut + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether expressed or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * Based on the TPS65086 driver + * + * NOTE: Interrupts are not supported yet. + */ + +#include +#include +#include + +#include + +struct bd9571mwv_gpio { + struct gpio_chip chip; + struct bd9571mwv *bd; +}; + +static int bd9571mwv_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip); + int ret, val; + + ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_DIR, &val); + if (ret < 0) + return ret; + + return val & BIT(offset); +} + +static int bd9571mwv_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip); + + regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR, + BIT(offset), 0); + + return 0; +} + +static int bd9571mwv_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip); + + /* Set the initial value */ + regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT, + BIT(offset), value ? BIT(offset) : 0); + regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR, + BIT(offset), BIT(offset)); + + return 0; +} + +static int bd9571mwv_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip); + int ret, val; + + ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_IN, &val); + if (ret < 0) + return ret; + + return val & BIT(offset); +} + +static void bd9571mwv_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip); + + regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT, + BIT(offset), value ? BIT(offset) : 0); +} + +static const struct gpio_chip template_chip = { + .label = "bd9571mwv-gpio", + .owner = THIS_MODULE, + .get_direction = bd9571mwv_gpio_get_direction, + .direction_input = bd9571mwv_gpio_direction_input, + .direction_output = bd9571mwv_gpio_direction_output, + .get = bd9571mwv_gpio_get, + .set = bd9571mwv_gpio_set, + .base = -1, + .ngpio = 2, + .can_sleep = true, +}; + +static int bd9571mwv_gpio_probe(struct platform_device *pdev) +{ + struct bd9571mwv_gpio *gpio; + int ret; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + platform_set_drvdata(pdev, gpio); + + gpio->bd = dev_get_drvdata(pdev->dev.parent); + gpio->chip = template_chip; + gpio->chip.parent = gpio->bd->dev; + + ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); + if (ret < 0) { + dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); + return ret; + } + + return 0; +} + +static const struct platform_device_id bd9571mwv_gpio_id_table[] = { + { "bd9571mwv-gpio", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, bd9571mwv_gpio_id_table); + +static struct platform_driver bd9571mwv_gpio_driver = { + .driver = { + .name = "bd9571mwv-gpio", + }, + .probe = bd9571mwv_gpio_probe, + .id_table = bd9571mwv_gpio_id_table, +}; +module_platform_driver(bd9571mwv_gpio_driver); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("BD9571MWV GPIO driver"); +MODULE_LICENSE("GPL v2");