From patchwork Thu Jun 29 10:18:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 9816357 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EFE3D6020A for ; Thu, 29 Jun 2017 10:19:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E50A128697 for ; Thu, 29 Jun 2017 10:19:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D81592869A; Thu, 29 Jun 2017 10:19:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A36F285D9 for ; Thu, 29 Jun 2017 10:19:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752601AbdF2KTp (ORCPT ); Thu, 29 Jun 2017 06:19:45 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:35060 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752590AbdF2KTo (ORCPT ); Thu, 29 Jun 2017 06:19:44 -0400 Received: by mail-wr0-f193.google.com with SMTP id z45so36483820wrb.2; Thu, 29 Jun 2017 03:19:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wAA50+4Pnskv5U0r2HHpJXuOwV9Z8cUYbUT9vI49M3A=; b=usUXuU3i223RUBRcpJbFSX5bToa/83QjOd2JE0Pj9UC9GmWL5Kid6AE9Fj/91nE49V xgdH/WM5Abj1bjNTaz03y1lBIbP17AG/oaICsyXIzHzfATdEzmuDBgtzCt8p+868SMyV 8LoPAT9vWss18RwYo9Fu5FVDHz1KIaT2xixEBbUxAoQo5+qeucc6r8drzykA6AgJnclJ pbeoo0B64qcybFZ9fKnD2QsyBN/ZNwE550XsygeZOM2JUonGYz1paN6+6xqn697REsYs 93Sb9dTkGiQaRlWRdqCvVtzvmXUzORgGBVrdNU9lbRO9Hb6BKtbdL8x3kpl9lqAabKof HGMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wAA50+4Pnskv5U0r2HHpJXuOwV9Z8cUYbUT9vI49M3A=; b=V68ejXXlUxH6QlvGtJBfinFdBbD6NPG2sshtxcCyFpt3lMoJgLZ8zqevipsbxGc7pU IDd7UsBIAQ/pM8r/VBMoqU95eBEMKyAK5Yeflr0HPQ49owvHgJzjedxkulRfsg2SCdZH Uy9Uc9mzC9jWRHOwj5/S7oupFmtuxi6NCv49tGvIrPkiRbOzKy388E54gJmbrinw3Xej IEqtdcTwMw8othZcYhoWCvU/ONrHHIVLPn03wf8HnhvMDGem6lMWEDtDSepodN8/0b1k STO5NwyVh3LC8/6A6Ts9M1obn/zeaMeu0cxemealdDhJbQAr3wxE+dz8F1gxsof0NkzL 1Muw== X-Gm-Message-State: AKS2vOz6FaZfNkkQ9c/tu9OvGi56AFJaZac87xEnfuz6ZhDXWjgGKJ/r Q2rRXk8DdoZ4jRqJhmM= X-Received: by 10.223.148.129 with SMTP id 1mr24039667wrr.28.1498731582975; Thu, 29 Jun 2017 03:19:42 -0700 (PDT) Received: from chi.lan (cst-prg-169-255.cust.vodafone.cz. [46.135.169.255]) by smtp.gmail.com with ESMTPSA id t74sm7623653wmt.19.2017.06.29.03.19.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Jun 2017 03:19:42 -0700 (PDT) From: Marek Vasut To: linux-clk@vger.kernel.org Cc: Marek Vasut , Alexey Firago , Stephen Boyd , Michael Turquette , Laurent Pinchart , linux-renesas-soc@vger.kernel.org Subject: [PATCH 8/8] clk: vc5: Add support for IDT VersaClock 5P49V6901 Date: Thu, 29 Jun 2017 12:18:51 +0200 Message-Id: <20170629101851.23972-8-marek.vasut@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170629101851.23972-1-marek.vasut@gmail.com> References: <20170629101851.23972-1-marek.vasut@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Vasut Update IDT VersaClock 6 driver to support 5P49V6901. This chip has two clock inputs (external XTAL or external CLKIN), four fractional dividers (FODs) and five clock outputs (four universal clock outputs and one reference clock output at OUT0_SELB_I2C). Signed-off-by: Marek Vasut Cc: Alexey Firago Cc: Stephen Boyd Cc: Michael Turquette Cc: Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org --- drivers/clk/clk-versaclock5.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index 6db84358520a..6e3166e00c8e 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -131,6 +131,7 @@ enum vc5_model { IDT_VC5_5P49V5923, IDT_VC5_5P49V5933, IDT_VC5_5P49V5935, + IDT_VC6_5P49V6901, }; /* Structure to describe features of a particular VC5 model */ @@ -687,6 +688,7 @@ static int vc5_map_index_to_output(const enum vc5_model model, return (n == 0) ? 0 : 3; case IDT_VC5_5P49V5923: case IDT_VC5_5P49V5935: + case IDT_VC6_5P49V6901: default: return n; } @@ -924,10 +926,18 @@ static const struct vc5_chip_info idt_5p49v5935_info = { .flags = VC5_HAS_INTERNAL_XTAL, }; +static const struct vc5_chip_info idt_5p49v6901_info = { + .model = IDT_VC6_5P49V6901, + .clk_fod_cnt = 4, + .clk_out_cnt = 5, + .flags = VC5_HAS_PFD_FREQ_DBL, +}; + static const struct i2c_device_id vc5_id[] = { { "5p49v5923", .driver_data = IDT_VC5_5P49V5923 }, { "5p49v5933", .driver_data = IDT_VC5_5P49V5933 }, { "5p49v5935", .driver_data = IDT_VC5_5P49V5935 }, + { "5p49v6901", .driver_data = IDT_VC6_5P49V6901 }, { } }; MODULE_DEVICE_TABLE(i2c, vc5_id); @@ -936,6 +946,7 @@ static const struct of_device_id clk_vc5_of_match[] = { { .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info }, { .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info }, { .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info }, + { .compatible = "idt,5p49v6901", .data = &idt_5p49v6901_info }, { }, }; MODULE_DEVICE_TABLE(of, clk_vc5_of_match);