From patchwork Sat Jul 1 20:04:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 9820973 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B390C603F3 for ; Sat, 1 Jul 2017 20:05:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A85ED2844B for ; Sat, 1 Jul 2017 20:05:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D37B2845D; Sat, 1 Jul 2017 20:05:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 382872846A for ; Sat, 1 Jul 2017 20:05:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752054AbdGAUFn (ORCPT ); Sat, 1 Jul 2017 16:05:43 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35800 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752041AbdGAUFl (ORCPT ); Sat, 1 Jul 2017 16:05:41 -0400 Received: by mail-wm0-f68.google.com with SMTP id u23so13598658wma.2; Sat, 01 Jul 2017 13:05:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WLfvsE+Y77EZ1h+P3uogpM3gOM2jZKP2ce78ryCbxY4=; b=LsjEBCRHIQwi7S7Z5c7j3Kbkdf1PXtdigHERciPd71My712vRiddw+aTqXm0/9TiMn cUGboHAa8vedQgkk9PcHYj7uFHq0HWXIlb8haouidUnf3d0pdHOJJN3IAbsyXdNUzhro Abf4ho0AEEn4BnDU1Wwze7uHO9t2NxWJWD+j4aQ5rtRNxaFRMesvJiWWZEebbzW+racP ZPumQDAhcCCH8lYcWROusWRPD+LBmSzA4VwREnUgByiJxn7G0YN9BeVGfpYbd158I+Kk PTi7rijxq+hNmEpUznjOVg5oNk8A0n6tIGoclIznAl7U0nOads1eXABxMMnKEfYlCVI0 o+sQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WLfvsE+Y77EZ1h+P3uogpM3gOM2jZKP2ce78ryCbxY4=; b=OveRe6/dQTHnimlLhMqpM6iNEAgnIVY20rIZu20mGsiA2LfxckAqBci/uwSX+IdrJc GhYXQ0b5DJpBSWh592ImhlVLC2iU0U3wRxvS1ngPvWV2gmDtcrMbGjo/VGh7ZHCnhj49 6LJ7WsfRUpcqKh2gGc+qGwaJDZYEd8YQC2TvgIj7LOMfE82MnRov6gflOSxc7z0YgbvC ducus2qeJhoSh9ky2Re6akHufJ1aep+H+MHlo/Vxzn/lCxfIiVEY+VNYtlmo8QamNFGA fep51Q9sIKU+p1H7a3kzKXWghwgk8RhZBs478pnrPqRH2oGGdAQvEfg+IGud0Djfgjp6 1a6g== X-Gm-Message-State: AKS2vOz/eKSGCyIhIkv/1RxT74Z9Ty8KuQ521l1GihwRpXDWdBDNsQzi D5r/LkuH0Bs8ZnSIKrg= X-Received: by 10.28.22.6 with SMTP id 6mr20144831wmw.124.1498939539243; Sat, 01 Jul 2017 13:05:39 -0700 (PDT) Received: from kurokawa.lan (ip-86-49-107-50.net.upcbroadband.cz. [86.49.107.50]) by smtp.gmail.com with ESMTPSA id s30sm18150137wrc.13.2017.07.01.13.05.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 01 Jul 2017 13:05:38 -0700 (PDT) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-clk@vger.kernel.org Cc: Marek Vasut , Alexey Firago , Stephen Boyd , Michael Turquette , Laurent Pinchart , linux-renesas-soc@vger.kernel.org Subject: [PATCH V2 8/8] clk: vc5: Add support for IDT VersaClock 5P49V6901 Date: Sat, 1 Jul 2017 22:04:58 +0200 Message-Id: <20170701200459.11505-8-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170701200459.11505-1-marek.vasut+renesas@gmail.com> References: <20170701200459.11505-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update IDT VersaClock 5 driver to support IDT VersaClock 6 5P49V6901. This chip has two clock inputs (external XTAL or external CLKIN), four fractional dividers (FODs) and five clock outputs (four universal clock outputs and one reference clock output at OUT0_SELB_I2C). Signed-off-by: Marek Vasut Cc: Alexey Firago Cc: Stephen Boyd Cc: Michael Turquette Cc: Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org Tested-by: Laurent Pinchart on Salvator-XS with the display LVDS output. --- V2: - Reword the commit message to explicitly mention the VC5 driver and the added support for VC6. - Mention VC6 in Kconfig --- drivers/clk/Kconfig | 6 +++--- drivers/clk/clk-versaclock5.c | 11 +++++++++++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index d406b087553f..99adcb0d799c 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -210,14 +210,14 @@ config COMMON_CLK_OXNAS Support for the OXNAS SoC Family clocks. config COMMON_CLK_VC5 - tristate "Clock driver for IDT VersaClock5 devices" + tristate "Clock driver for IDT VersaClock 5,6 devices" depends on I2C depends on OF select REGMAP_I2C help ---help--- - This driver supports the IDT VersaClock5 programmable clock - generator. + This driver supports the IDT VersaClock 5 and VersaClock 6 + programmable clock generators. source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index d0406b62133a..c894db298cbd 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -131,6 +131,7 @@ enum vc5_model { IDT_VC5_5P49V5923, IDT_VC5_5P49V5933, IDT_VC5_5P49V5935, + IDT_VC6_5P49V6901, }; /* Structure to describe features of a particular VC5 model */ @@ -686,6 +687,7 @@ static int vc5_map_index_to_output(const enum vc5_model model, return (n == 0) ? 0 : 3; case IDT_VC5_5P49V5923: case IDT_VC5_5P49V5935: + case IDT_VC6_5P49V6901: default: return n; } @@ -923,10 +925,18 @@ static const struct vc5_chip_info idt_5p49v5935_info = { .flags = VC5_HAS_INTERNAL_XTAL, }; +static const struct vc5_chip_info idt_5p49v6901_info = { + .model = IDT_VC6_5P49V6901, + .clk_fod_cnt = 4, + .clk_out_cnt = 5, + .flags = VC5_HAS_PFD_FREQ_DBL, +}; + static const struct i2c_device_id vc5_id[] = { { "5p49v5923", .driver_data = IDT_VC5_5P49V5923 }, { "5p49v5933", .driver_data = IDT_VC5_5P49V5933 }, { "5p49v5935", .driver_data = IDT_VC5_5P49V5935 }, + { "5p49v6901", .driver_data = IDT_VC6_5P49V6901 }, { } }; MODULE_DEVICE_TABLE(i2c, vc5_id); @@ -935,6 +945,7 @@ static const struct of_device_id clk_vc5_of_match[] = { { .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info }, { .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info }, { .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info }, + { .compatible = "idt,5p49v6901", .data = &idt_5p49v6901_info }, { }, }; MODULE_DEVICE_TABLE(of, clk_vc5_of_match);