From patchwork Fri Nov 10 21:58:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10053841 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CA2796032D for ; Fri, 10 Nov 2017 21:59:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE7C82929B for ; Fri, 10 Nov 2017 21:59:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B33092B11C; Fri, 10 Nov 2017 21:59:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C9D92929B for ; Fri, 10 Nov 2017 21:59:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751347AbdKJV7C (ORCPT ); Fri, 10 Nov 2017 16:59:02 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:56025 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750932AbdKJV7B (ORCPT ); Fri, 10 Nov 2017 16:59:01 -0500 Received: by mail-wr0-f196.google.com with SMTP id l8so9698002wre.12; Fri, 10 Nov 2017 13:59:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5jcMxWAQ502Cq+0SEFTryZJUU+ck9qr0qEK5Z6t9FDU=; b=FhL14YIKUDV6n4o8gC9bksdGEpT95tcMGklNqz03aZNg09zNkl6nb2HHXEJFFCeY3e JyLGFGiW7Ykjviw+ogSlh4aUxHPy8k8+ZXU9Ve4ETkJbzMg8JefE/zy7Hszvm+rprYt1 jDaD1+RoEJzUNdbW3kYNaga0BG2OJ1ARKKxQkkOwmI4y2XUp0JhhCQyB7oKI+pAR7DP1 g/FnsIdtlEgPhFx7aKmTKWf0G7I/EHBM/GxbVT8mYYGAjrdbGZfKLQz9cyMo51tqQeIi vjQmq5vaiPkbQtJhIZEORaClriReAwFc0+1BqPeLwig49pxNIsli1Tkckj9Baez/BiGM LHvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5jcMxWAQ502Cq+0SEFTryZJUU+ck9qr0qEK5Z6t9FDU=; b=kHpkz8R9yPiyUdqrraNwmSJqPoe646lu/sFUWEGAR7n0PcOlTBnuCpTk/fi2KIWt+O 5HSmebViS90iyl0yRK3+gH4aH5VDxfcw8kp/ElYBJN5yv/62qqKCB+ML+TzpMql0yxpG Ib9fqK68RLsbycxM88EIkwiafEWufLsgxOKHpxpAnb6MqRTIbQmFK1J0IfA07O9Du4/Z WoBViwXrGX49hB6YzMG0ciraK5z84DxRL8KWrq4ngRghQsPyP44Bu1F/HbrX5/gaeTq6 lkbbFR5BLEhfWVwqrORqo6EYlUNKYKZdRJg5JFGeJyQid6yVZdNum2oaEUmj3tcrjxGr Kewg== X-Gm-Message-State: AJaThX4NADn/vkr9WV670DBA9CtP+XisqrHCupQBRI7EARD0QNpam31E eF6mFNC1ZywM2/nF3jDMaNzSgO6+ X-Google-Smtp-Source: AGs4zMaThXKl3nqlhvNeB08s1taocWQIZCUKakfjORvPaeSC2QQjbQLYyj3Qa9SwtqwxX+W1SmK2uw== X-Received: by 10.223.146.167 with SMTP id 36mr1386231wrn.155.1510351139747; Fri, 10 Nov 2017 13:58:59 -0800 (PST) Received: from kurokawa.lan (ip-86-49-107-50.net.upcbroadband.cz. [86.49.107.50]) by smtp.gmail.com with ESMTPSA id c3sm4560784wrd.44.2017.11.10.13.58.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Nov 2017 13:58:59 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-pci@vger.kernel.org Cc: Marek Vasut , Geert Uytterhoeven , Phil Edworthy , Simon Horman , Wolfram Sang , linux-renesas-soc@vger.kernel.org Subject: [PATCH V2 2/5] PCI: rcar: Clean up the macros Date: Fri, 10 Nov 2017 22:58:40 +0100 Message-Id: <20171110215843.432-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110215843.432-1-marek.vasut+renesas@gmail.com> References: <20171110215843.432-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just clean up the macros in the RCar PCI driver, no functional change. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Phil Edworthy Cc: Simon Horman Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org Acked-by: Simon Horman --- V2: New patch --- drivers/pci/host/pcie-rcar.c | 52 ++++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index 351e1276b90a..811e8194ef74 100644 --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c @@ -33,9 +33,9 @@ #define PCIECAR 0x000010 #define PCIECCTLR 0x000018 -#define CONFIG_SEND_ENABLE (1 << 31) +#define CONFIG_SEND_ENABLE BIT(31) #define TYPE0 (0 << 8) -#define TYPE1 (1 << 8) +#define TYPE1 BIT(8) #define PCIECDR 0x000020 #define PCIEMSR 0x000028 #define PCIEINTXR 0x000400 @@ -47,7 +47,7 @@ #define PCIETSTR 0x02004 #define DATA_LINK_ACTIVE 1 #define PCIEERRFR 0x02020 -#define UNSUPPORTED_REQUEST (1 << 4) +#define UNSUPPORTED_REQUEST BIT(4) #define PCIEMSIFR 0x02044 #define PCIEMSIALR 0x02048 #define MSIFE 1 @@ -60,17 +60,17 @@ /* local address reg & mask */ #define PCIELAR(x) (0x02200 + ((x) * 0x20)) #define PCIELAMR(x) (0x02208 + ((x) * 0x20)) -#define LAM_PREFETCH (1 << 3) -#define LAM_64BIT (1 << 2) -#define LAR_ENABLE (1 << 1) +#define LAM_PREFETCH BIT(3) +#define LAM_64BIT BIT(2) +#define LAR_ENABLE BIT(1) /* PCIe address reg & mask */ #define PCIEPALR(x) (0x03400 + ((x) * 0x20)) #define PCIEPAUR(x) (0x03404 + ((x) * 0x20)) #define PCIEPAMR(x) (0x03408 + ((x) * 0x20)) #define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20)) -#define PAR_ENABLE (1 << 31) -#define IO_SPACE (1 << 8) +#define PAR_ENABLE BIT(31) +#define IO_SPACE BIT(8) /* Configuration */ #define PCICONF(x) (0x010000 + ((x) * 0x4)) @@ -82,23 +82,23 @@ #define IDSETR1 0x011004 #define TLCTLR 0x011048 #define MACSR 0x011054 -#define SPCHGFIN (1 << 4) -#define SPCHGFAIL (1 << 6) -#define SPCHGSUC (1 << 7) +#define SPCHGFIN BIT(4) +#define SPCHGFAIL BIT(6) +#define SPCHGSUC BIT(7) #define LINK_SPEED (0xf << 16) #define LINK_SPEED_2_5GTS (1 << 16) #define LINK_SPEED_5_0GTS (2 << 16) #define MACCTLR 0x011058 -#define SPEED_CHANGE (1 << 24) -#define SCRAMBLE_DISABLE (1 << 27) +#define SPEED_CHANGE BIT(24) +#define SCRAMBLE_DISABLE BIT(27) #define MACS2R 0x011078 #define MACCGSPSETR 0x011084 -#define SPCNGRSN (1 << 31) +#define SPCNGRSN BIT(31) /* R-Car H1 PHY */ #define H1_PCIEPHYADRR 0x04000c -#define WRITE_CMD (1 << 16) -#define PHY_ACK (1 << 24) +#define WRITE_CMD BIT(16) +#define PHY_ACK BIT(24) #define RATE_POS 12 #define LANE_POS 8 #define ADR_POS 0 @@ -110,19 +110,19 @@ #define GEN2_PCIEPHYDATA 0x784 #define GEN2_PCIEPHYCTRL 0x78c -#define INT_PCI_MSI_NR 32 +#define INT_PCI_MSI_NR 32 -#define RCONF(x) (PCICONF(0)+(x)) -#define RPMCAP(x) (PMCAP(0)+(x)) -#define REXPCAP(x) (EXPCAP(0)+(x)) -#define RVCCAP(x) (VCCAP(0)+(x)) +#define RCONF(x) (PCICONF(0) + (x)) +#define RPMCAP(x) (PMCAP(0) + (x)) +#define REXPCAP(x) (EXPCAP(0) + (x)) +#define RVCCAP(x) (VCCAP(0) + (x)) -#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) -#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) -#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) +#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) +#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) +#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) -#define RCAR_PCI_MAX_RESOURCES 4 -#define MAX_NR_INBOUND_MAPS 6 +#define RCAR_PCI_MAX_RESOURCES 4 +#define MAX_NR_INBOUND_MAPS 6 struct rcar_msi { DECLARE_BITMAP(used, INT_PCI_MSI_NR);