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[86.49.107.50]) by smtp.gmail.com with ESMTPSA id c3sm4560784wrd.44.2017.11.10.13.58.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Nov 2017 13:59:00 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-pci@vger.kernel.org Cc: Kazufumi Ikeda , Gaku Inami , Marek Vasut , Geert Uytterhoeven , Phil Edworthy , Simon Horman , Wolfram Sang , linux-renesas-soc@vger.kernel.org Subject: [PATCH V2 3/5] PCI: rcar: Add the initialization of PCIe link in resume_noirq Date: Fri, 10 Nov 2017 22:58:41 +0100 Message-Id: <20171110215843.432-4-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110215843.432-1-marek.vasut+renesas@gmail.com> References: <20171110215843.432-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kazufumi Ikeda Reestablish the PCIe link very early in the resume process in case it went down to prevent PCI accesses from hanging the bus. Such accesses can happen early in the PCI resume process, in the resume_noirq, thus the link must be reestablished in the resume_noirq callback of the driver. Signed-off-by: Kazufumi Ikeda Signed-off-by: Gaku Inami Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Phil Edworthy Cc: Simon Horman Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org Acked-by: Simon Horman --- V2: - Use BIT() macro for (1 << n) - Since polling in rcar_pcie_wait_for_dl() uses udelay(), do not add extra changes to this function anymore - Make resume_noirq return early and clean up parenthesis therein --- drivers/pci/host/pcie-rcar.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index 811e8194ef74..ab61829db389 100644 --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c @@ -43,6 +43,7 @@ /* Transfer control */ #define PCIETCTLR 0x02000 +#define DL_DOWN BIT(3) #define CFINIT 1 #define PCIETSTR 0x02004 #define DATA_LINK_ACTIVE 1 @@ -1107,6 +1108,7 @@ static int rcar_pcie_probe(struct platform_device *pdev) pcie = pci_host_bridge_priv(bridge); pcie->dev = dev; + platform_set_drvdata(pdev, pcie); INIT_LIST_HEAD(&pcie->resources); @@ -1167,10 +1169,28 @@ static int rcar_pcie_probe(struct platform_device *pdev) return err; } +static int rcar_pcie_resume_noirq(struct device *dev) +{ + struct rcar_pcie *pcie = dev_get_drvdata(dev); + + if (rcar_pci_read_reg(pcie, PMSR) && + !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN)) + return 0; + + /* Re-establish the PCIe link */ + rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); + return rcar_pcie_wait_for_dl(pcie); +} + +static const struct dev_pm_ops rcar_pcie_pm_ops = { + .resume_noirq = rcar_pcie_resume_noirq, +}; + static struct platform_driver rcar_pcie_driver = { .driver = { .name = "rcar-pcie", .of_match_table = rcar_pcie_of_match, + .pm = &rcar_pcie_pm_ops, .suppress_bind_attrs = true, }, .probe = rcar_pcie_probe,