From patchwork Sun Apr 8 18:04:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10328459 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B91E60385 for ; Sun, 8 Apr 2018 18:04:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 49C762837E for ; Sun, 8 Apr 2018 18:04:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3AFF8289F2; Sun, 8 Apr 2018 18:04:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 58AA92837E for ; Sun, 8 Apr 2018 18:04:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751919AbeDHSEj (ORCPT ); Sun, 8 Apr 2018 14:04:39 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:36592 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751738AbeDHSEi (ORCPT ); Sun, 8 Apr 2018 14:04:38 -0400 Received: by mail-wr0-f193.google.com with SMTP id y55so6386901wry.3; Sun, 08 Apr 2018 11:04:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FXkaMchkuvNvG9dFf7r5ZcqI6Y4FA/eJrYrPHfgM7yY=; b=N4f+WUmRuF6TyVua1SiLtNhPzOjoAJ18IINsN5/v+un49zOoariIVnzNKGWfiGHSmQ +r327Ibqew49YlrUer3jOyh7W/8+WKCg5vAxOvpz4nreAxiEmzKvPhs/HEoa6pG51a7Q 0n8qWT9Pz4A5E+phQK6zglUEDID7ng9L1HIg2ZZYW79zHOXI1AJ/bSW2DgfqSM2AThMf rqeVYPLxZVZBGN7ez05EwYkMisRcqmmiGo6UJMiX383mr+SPcBTQ3GRtW/jynyJCr2pV 4N44W5fkGe2JEdtrib7nIUh1odJBvyAnQbAwBV8mPZwh04PHLc0Nn2BPagIk+2DQ5H/s gaYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FXkaMchkuvNvG9dFf7r5ZcqI6Y4FA/eJrYrPHfgM7yY=; b=ZeglZd3mdVCbwM6j5xIk0RAdusL2DEo4RB17rJLh9p4Pq0mryCg0cSGPF2RfMwNNxG kaSejxnQHbtDcz1unaSXySbG1FAo88NSTIfXWQRz6Ndp4nrbb+zzN3LBlX6AUube02Vh EIpimiNAB1BRdyV28rL2TSBOtOzg7E8MFfrCgZF6WCvBu3s1F2RtF8uoHz7QDVoENjx2 c2MOXqSZMes0Icj1grk7rFUcETBClzlz0d8bd++5ydjM9WZMFhKvVGV24QgG18igr8zC ikNL+ZswEfbo8NmZidlHXBoN2OG7tHflZeFt4v1uAqbSfKDW3dvpQ9pOAJiQW7kHGvFJ mNFg== X-Gm-Message-State: AElRT7H+uMLyy6SkrjYKYDgQaj+PtVAjalCwtnPvziqOEde2BGiTvdK1 FSUoJgssPK8i9HZXxsHMvq/ZiNrT X-Google-Smtp-Source: AIpwx4/KWeZ4VbtFBu8+YJSEYgmtL4vb7jGpFCK5c09l4ioj8uMzfa/vKh44SQQ0qZ9e5NekJPkWfA== X-Received: by 10.223.154.100 with SMTP id z91mr23984793wrb.120.1523210676519; Sun, 08 Apr 2018 11:04:36 -0700 (PDT) Received: from kurokawa.lan (ip-86-49-107-50.net.upcbroadband.cz. [86.49.107.50]) by smtp.gmail.com with ESMTPSA id g38sm20921038wra.77.2018.04.08.11.04.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 08 Apr 2018 11:04:35 -0700 (PDT) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-pci@vger.kernel.org Cc: Marek Vasut , Geert Uytterhoeven , Phil Edworthy , Simon Horman , Wolfram Sang , linux-renesas-soc@vger.kernel.org Subject: [PATCH V3] PCI: rcar: Clean up the macros Date: Sun, 8 Apr 2018 20:04:31 +0200 Message-Id: <20180408180431.17323-1-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.16.2 MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch replaces the (1 << n) with BIT(n) and cleans up whitespace, no functional change. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Phil Edworthy Cc: Simon Horman Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Niklas Söderlund Acked-by: Randy Dunlap Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman Reviewed-by: Simon Horman --- V2: Reword the commit message V3: Add bitops.h --- drivers/pci/host/pcie-rcar.c | 53 ++++++++++++++++++++++---------------------- 1 file changed, 27 insertions(+), 26 deletions(-) diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index 25f68305322c..e403c5206b24 100644 --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c @@ -11,6 +11,7 @@ * Author: Phil Edworthy */ +#include #include #include #include @@ -30,9 +31,9 @@ #define PCIECAR 0x000010 #define PCIECCTLR 0x000018 -#define CONFIG_SEND_ENABLE (1 << 31) +#define CONFIG_SEND_ENABLE BIT(31) #define TYPE0 (0 << 8) -#define TYPE1 (1 << 8) +#define TYPE1 BIT(8) #define PCIECDR 0x000020 #define PCIEMSR 0x000028 #define PCIEINTXR 0x000400 @@ -44,7 +45,7 @@ #define PCIETSTR 0x02004 #define DATA_LINK_ACTIVE 1 #define PCIEERRFR 0x02020 -#define UNSUPPORTED_REQUEST (1 << 4) +#define UNSUPPORTED_REQUEST BIT(4) #define PCIEMSIFR 0x02044 #define PCIEMSIALR 0x02048 #define MSIFE 1 @@ -57,17 +58,17 @@ /* local address reg & mask */ #define PCIELAR(x) (0x02200 + ((x) * 0x20)) #define PCIELAMR(x) (0x02208 + ((x) * 0x20)) -#define LAM_PREFETCH (1 << 3) -#define LAM_64BIT (1 << 2) -#define LAR_ENABLE (1 << 1) +#define LAM_PREFETCH BIT(3) +#define LAM_64BIT BIT(2) +#define LAR_ENABLE BIT(1) /* PCIe address reg & mask */ #define PCIEPALR(x) (0x03400 + ((x) * 0x20)) #define PCIEPAUR(x) (0x03404 + ((x) * 0x20)) #define PCIEPAMR(x) (0x03408 + ((x) * 0x20)) #define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20)) -#define PAR_ENABLE (1 << 31) -#define IO_SPACE (1 << 8) +#define PAR_ENABLE BIT(31) +#define IO_SPACE BIT(8) /* Configuration */ #define PCICONF(x) (0x010000 + ((x) * 0x4)) @@ -79,23 +80,23 @@ #define IDSETR1 0x011004 #define TLCTLR 0x011048 #define MACSR 0x011054 -#define SPCHGFIN (1 << 4) -#define SPCHGFAIL (1 << 6) -#define SPCHGSUC (1 << 7) +#define SPCHGFIN BIT(4) +#define SPCHGFAIL BIT(6) +#define SPCHGSUC BIT(7) #define LINK_SPEED (0xf << 16) #define LINK_SPEED_2_5GTS (1 << 16) #define LINK_SPEED_5_0GTS (2 << 16) #define MACCTLR 0x011058 -#define SPEED_CHANGE (1 << 24) -#define SCRAMBLE_DISABLE (1 << 27) +#define SPEED_CHANGE BIT(24) +#define SCRAMBLE_DISABLE BIT(27) #define MACS2R 0x011078 #define MACCGSPSETR 0x011084 -#define SPCNGRSN (1 << 31) +#define SPCNGRSN BIT(31) /* R-Car H1 PHY */ #define H1_PCIEPHYADRR 0x04000c -#define WRITE_CMD (1 << 16) -#define PHY_ACK (1 << 24) +#define WRITE_CMD BIT(16) +#define PHY_ACK BIT(24) #define RATE_POS 12 #define LANE_POS 8 #define ADR_POS 0 @@ -107,19 +108,19 @@ #define GEN2_PCIEPHYDATA 0x784 #define GEN2_PCIEPHYCTRL 0x78c -#define INT_PCI_MSI_NR 32 +#define INT_PCI_MSI_NR 32 -#define RCONF(x) (PCICONF(0)+(x)) -#define RPMCAP(x) (PMCAP(0)+(x)) -#define REXPCAP(x) (EXPCAP(0)+(x)) -#define RVCCAP(x) (VCCAP(0)+(x)) +#define RCONF(x) (PCICONF(0) + (x)) +#define RPMCAP(x) (PMCAP(0) + (x)) +#define REXPCAP(x) (EXPCAP(0) + (x)) +#define RVCCAP(x) (VCCAP(0) + (x)) -#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) -#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) -#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) +#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) +#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) +#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) -#define RCAR_PCI_MAX_RESOURCES 4 -#define MAX_NR_INBOUND_MAPS 6 +#define RCAR_PCI_MAX_RESOURCES 4 +#define MAX_NR_INBOUND_MAPS 6 struct rcar_msi { DECLARE_BITMAP(used, INT_PCI_MSI_NR);