Message ID | 20190228135246.31714-5-horms+renesas@verge.net.au (mailing list archive) |
---|---|
State | Under Review |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | clk: renesas: rcar-gen3: Add ZG support for E3, D3 and RZ/G2E | expand |
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index eee3874865a9..0a13a1a7a909 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -76,6 +76,8 @@ static const struct cpg_core_clk r8a77995_core_clks[] __initconst = { /* Core Clock Outputs */ DEF_FIXED("z2", R8A77995_CLK_Z2, CLK_PLL0D3, 1, 1), + DEF_GEN3_Z("zg", R8A77995_CLK_ZG, CLK_TYPE_GEN3_Z, CLK_PLL0, + 5, CPG_FRQCRB, 24), DEF_FIXED("ztr", R8A77995_CLK_ZTR, CLK_PLL1, 6, 1), DEF_FIXED("zt", R8A77995_CLK_ZT, CLK_PLL1, 4, 1), DEF_FIXED("zx", R8A77995_CLK_ZX, CLK_PLL1, 3, 1),
Adds support for R-Car D3 (r8a77995) ZG clock. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- Compile tested only --- drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 ++ 1 file changed, 2 insertions(+)