| Message ID | 20190508173428.22054-9-jacopo+renesas@jmondi.org (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | drm: rcar-du: Add CMM support to M3-W (plumbing only) | expand |
On Wed, May 8, 2019 at 8:27 PM Jacopo Mondi <jacopo+renesas@jmondi.org> wrote: > Add clock defintions for CMM units on Renesas R-Car Gen3 M3-W. > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
Hi Jacopo, Thank you for the patch. On Wed, May 08, 2019 at 07:34:27PM +0200, Jacopo Mondi wrote: > Add clock defintions for CMM units on Renesas R-Car Gen3 M3-W. > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> We have no clear confirmation that the parent clock is S2D1, but this assumption makes sense given that the DU uses that clock. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c > index 12c455859f2c..6044aeda0f83 100644 > --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c > @@ -179,6 +179,9 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { > DEF_MOD("ehci1", 702, R8A7796_CLK_S3D4), > DEF_MOD("ehci0", 703, R8A7796_CLK_S3D4), > DEF_MOD("hsusb", 704, R8A7796_CLK_S3D4), > + DEF_MOD("cmm2", 709, R8A7796_CLK_S2D1), > + DEF_MOD("cmm1", 710, R8A7796_CLK_S2D1), > + DEF_MOD("cmm0", 711, R8A7796_CLK_S2D1), > DEF_MOD("csi20", 714, R8A7796_CLK_CSI0), > DEF_MOD("csi40", 716, R8A7796_CLK_CSI0), > DEF_MOD("du2", 722, R8A7796_CLK_S2D1),
On Sat, May 11, 2019 at 8:22 PM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > On Wed, May 08, 2019 at 07:34:27PM +0200, Jacopo Mondi wrote: > > Add clock defintions for CMM units on Renesas R-Car Gen3 M3-W. > > > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > We have no clear confirmation that the parent clock is S2D1, but this > assumption makes sense given that the DU uses that clock. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Applied to clk-renesas-for-v5.3, with the "defintions" fixed, and the context updated. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 12c455859f2c..6044aeda0f83 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -179,6 +179,9 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("ehci1", 702, R8A7796_CLK_S3D4), DEF_MOD("ehci0", 703, R8A7796_CLK_S3D4), DEF_MOD("hsusb", 704, R8A7796_CLK_S3D4), + DEF_MOD("cmm2", 709, R8A7796_CLK_S2D1), + DEF_MOD("cmm1", 710, R8A7796_CLK_S2D1), + DEF_MOD("cmm0", 711, R8A7796_CLK_S2D1), DEF_MOD("csi20", 714, R8A7796_CLK_CSI0), DEF_MOD("csi40", 716, R8A7796_CLK_CSI0), DEF_MOD("du2", 722, R8A7796_CLK_S2D1),
Add clock defintions for CMM units on Renesas R-Car Gen3 M3-W. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ 1 file changed, 3 insertions(+)