| Message ID | 20200228154122.14164-6-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add support for PCIe controller to work in endpoint mode on R-Car SoCs | expand |
Hi Prabhakar-san, Thank you for the patch! > From: Lad Prabhakar, Sent: Saturday, February 29, 2020 12:41 AM > > This patch adds the bindings for the R-Car PCIe endpoint driver. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
Hi Yoshihiro-san, > -----Original Message----- > From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Sent: 17 March 2020 08:26 > To: Lad Prabhakar <prabhakar.csengg@gmail.com> > Cc: Andrew Murray <andrew.murray@arm.com>; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-renesas-soc@vger.kernel.org; > linux-rockchip@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; Prabhakar Mahadev Lad <prabhakar.mahadev- > lad.rj@bp.renesas.com>; Rob Herring <robh@kernel.org>; Bjorn Helgaas > <bhelgaas@google.com>; Rob Herring <robh+dt@kernel.org>; Mark Rutland > <mark.rutland@arm.com>; Catalin Marinas <catalin.marinas@arm.com>; Will > Deacon <will@kernel.org>; Kishon Vijay Abraham I <kishon@ti.com>; > Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>; Arnd Bergmann > <arnd@arndb.de>; Greg Kroah-Hartman <gregkh@linuxfoundation.org>; > Jingoo Han <jingoohan1@gmail.com>; Gustavo Pimentel > <gustavo.pimentel@synopsys.com>; Marek Vasut > <marek.vasut+renesas@gmail.com>; Shawn Lin <shawn.lin@rock- > chips.com>; Heiko Stuebner <heiko@sntech.de> > Subject: RE: [PATCH v5 5/7] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe > endpoint controller > > Hi Prabhakar-san, > > Thank you for the patch! > > > From: Lad Prabhakar, Sent: Saturday, February 29, 2020 12:41 AM > > > > This patch adds the bindings for the R-Car PCIe endpoint driver. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev- > lad.rj@bp.renesas.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Thank you for the review. Shall I add this file under "PCI DRIVER FOR RENESAS R-CAR" In MAINTAINERS file as a separate patch ? Cheers, --Prabhakar > Best regards, > Yoshihiro Shimoda Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
Hi Prabhakar-san, > From: Prabhakar Mahadev Lad, Sent: Tuesday, March 17, 2020 7:18 PM <snip> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev- > > lad.rj@bp.renesas.com> > > > Reviewed-by: Rob Herring <robh@kernel.org> > > > > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > > Thank you for the review. Shall I add this file under "PCI DRIVER FOR RENESAS R-CAR" > In MAINTAINERS file as a separate patch ? That's a nice idea! I think we should add the following like for dt-binding: F: Documentation/devicetree/bindings/pci/*rcar* Best regards, Yoshihiro Shimoda > Cheers, > --Prabhakar > > > Best regards, > > Yoshihiro Shimoda
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml new file mode 100644 index 0000000..07cd5a7 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car PCIe Endpoint + +maintainers: + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> + +properties: + compatible: + items: + - const: renesas,r8a774c0-pcie-ep + - const: renesas,rcar-gen3-pcie-ep + + reg: + maxItems: 5 + + reg-names: + items: + - const: apb-base + - const: memory0 + - const: memory1 + - const: memory2 + - const: memory3 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pcie + + max-functions: + minimum: 1 + maximum: 6 + +required: + - compatible + - reg + - reg-names + - resets + - power-domains + - clocks + - clock-names + - max-functions + +examples: + - | + #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> + #include <dt-bindings/power/r8a774c0-sysc.h> + + pcie0_ep: pcie-ep@fe000000 { + compatible = "renesas,r8a774c0-pcie-ep", + "renesas,rcar-gen3-pcie-ep"; + reg = <0 0xfe000000 0 0x80000>, + <0x0 0xfe100000 0 0x100000>, + <0x0 0xfe200000 0 0x200000>, + <0x0 0x30000000 0 0x8000000>, + <0x0 0x38000000 0 0x8000000>; + reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + resets = <&cpg 319>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 319>; + clock-names = "pcie"; + max-functions = /bits/ 8 <1>; + };