| Message ID | 20200807174954.14448-7-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | r8a7742: Enable DU and LVDS | expand |
Hi Prabhakar, Thank you for the patch. On Fri, Aug 07, 2020 at 06:49:53PM +0100, Lad Prabhakar wrote: > Add LVDS encoder node to r8a7742 SoC DT. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > --- > arch/arm/boot/dts/r8a7742.dtsi | 54 ++++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi > index a979a4b3de61..a7e66220d63a 100644 > --- a/arch/arm/boot/dts/r8a7742.dtsi > +++ b/arch/arm/boot/dts/r8a7742.dtsi > @@ -1534,11 +1534,65 @@ > port@1 { > reg = <1>; > du_out_lvds0: endpoint { > + remote-endpoint = <&lvds0_in>; > }; > }; > port@2 { > reg = <2>; > du_out_lvds1: endpoint { > + remote-endpoint = <&lvds1_in>; > + }; > + }; > + }; > + }; > + > + lvds0: lvds@feb90000 { > + compatible = "renesas,r8a7742-lvds"; > + reg = <0 0xfeb90000 0 0x1c>; Isn't 0x14 enough for the size ? 0x1c won't hurt though. Same comment below. With or without this addressed, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + clocks = <&cpg CPG_MOD 726>; > + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; > + resets = <&cpg 726>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + lvds0_in: endpoint { > + remote-endpoint = <&du_out_lvds0>; > + }; > + }; > + port@1 { > + reg = <1>; > + lvds0_out: endpoint { > + }; > + }; > + }; > + }; > + > + lvds1: lvds@feb94000 { > + compatible = "renesas,r8a7742-lvds"; > + reg = <0 0xfeb94000 0 0x1c>; > + clocks = <&cpg CPG_MOD 725>; > + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; > + resets = <&cpg 725>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + lvds1_in: endpoint { > + remote-endpoint = <&du_out_lvds1>; > + }; > + }; > + port@1 { > + reg = <1>; > + lvds1_out: endpoint { > }; > }; > };
Hi Laurent, Thank you for the review. On Sat, Aug 8, 2020 at 10:13 PM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > Hi Prabhakar, > > Thank you for the patch. > > On Fri, Aug 07, 2020 at 06:49:53PM +0100, Lad Prabhakar wrote: > > Add LVDS encoder node to r8a7742 SoC DT. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > --- > > arch/arm/boot/dts/r8a7742.dtsi | 54 ++++++++++++++++++++++++++++++++++ > > 1 file changed, 54 insertions(+) > > > > diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi > > index a979a4b3de61..a7e66220d63a 100644 > > --- a/arch/arm/boot/dts/r8a7742.dtsi > > +++ b/arch/arm/boot/dts/r8a7742.dtsi > > @@ -1534,11 +1534,65 @@ > > port@1 { > > reg = <1>; > > du_out_lvds0: endpoint { > > + remote-endpoint = <&lvds0_in>; > > }; > > }; > > port@2 { > > reg = <2>; > > du_out_lvds1: endpoint { > > + remote-endpoint = <&lvds1_in>; > > + }; > > + }; > > + }; > > + }; > > + > > + lvds0: lvds@feb90000 { > > + compatible = "renesas,r8a7742-lvds"; > > + reg = <0 0xfeb90000 0 0x1c>; > > Isn't 0x14 enough for the size ? 0x1c won't hurt though. Same comment > below. > Agreed, 0x1c comes from Gen-3 manuals. Cheers, Prabhakar > With or without this addressed, > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > + clocks = <&cpg CPG_MOD 726>; > > + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; > > + resets = <&cpg 726>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + lvds0_in: endpoint { > > + remote-endpoint = <&du_out_lvds0>; > > + }; > > + }; > > + port@1 { > > + reg = <1>; > > + lvds0_out: endpoint { > > + }; > > + }; > > + }; > > + }; > > + > > + lvds1: lvds@feb94000 { > > + compatible = "renesas,r8a7742-lvds"; > > + reg = <0 0xfeb94000 0 0x1c>; > > + clocks = <&cpg CPG_MOD 725>; > > + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; > > + resets = <&cpg 725>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + lvds1_in: endpoint { > > + remote-endpoint = <&du_out_lvds1>; > > + }; > > + }; > > + port@1 { > > + reg = <1>; > > + lvds1_out: endpoint { > > }; > > }; > > }; > > -- > Regards, > > Laurent Pinchart
Hi Prabhakar, Laurent, On Sun, Aug 9, 2020 at 11:30 PM Lad, Prabhakar <prabhakar.csengg@gmail.com> wrote: > On Sat, Aug 8, 2020 at 10:13 PM Laurent Pinchart > <laurent.pinchart@ideasonboard.com> wrote: > > On Fri, Aug 07, 2020 at 06:49:53PM +0100, Lad Prabhakar wrote: > > > Add LVDS encoder node to r8a7742 SoC DT. > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > > --- > > > arch/arm/boot/dts/r8a7742.dtsi | 54 ++++++++++++++++++++++++++++++++++ > > > 1 file changed, 54 insertions(+) > > > > > > diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi > > > index a979a4b3de61..a7e66220d63a 100644 > > > --- a/arch/arm/boot/dts/r8a7742.dtsi > > > +++ b/arch/arm/boot/dts/r8a7742.dtsi > > > @@ -1534,11 +1534,65 @@ > > > port@1 { > > > reg = <1>; > > > du_out_lvds0: endpoint { > > > + remote-endpoint = <&lvds0_in>; > > > }; > > > }; > > > port@2 { > > > reg = <2>; > > > du_out_lvds1: endpoint { > > > + remote-endpoint = <&lvds1_in>; > > > + }; > > > + }; > > > + }; > > > + }; > > > + > > > + lvds0: lvds@feb90000 { > > > + compatible = "renesas,r8a7742-lvds"; > > > + reg = <0 0xfeb90000 0 0x1c>; > > > > Isn't 0x14 enough for the size ? 0x1c won't hurt though. Same comment > > below. I can fix that while applying. > Agreed, 0x1c comes from Gen-3 manuals. All R-Car Gen3 and RZ/G2 .dtsi use 0x14 or 0x20. All R-Car Gen2 and RZ/G1 .dtsi use 0x1c, but their manual suggests 0x14, too? Doesn't matter much, as the hardware address decoder probably uses a multiple of 2, and page mapping granularity is at least 4 KiB anyway. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.10, with the above fixed. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index a979a4b3de61..a7e66220d63a 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -1534,11 +1534,65 @@ port@1 { reg = <1>; du_out_lvds0: endpoint { + remote-endpoint = <&lvds0_in>; }; }; port@2 { reg = <2>; du_out_lvds1: endpoint { + remote-endpoint = <&lvds1_in>; + }; + }; + }; + }; + + lvds0: lvds@feb90000 { + compatible = "renesas,r8a7742-lvds"; + reg = <0 0xfeb90000 0 0x1c>; + clocks = <&cpg CPG_MOD 726>; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 726>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds0_in: endpoint { + remote-endpoint = <&du_out_lvds0>; + }; + }; + port@1 { + reg = <1>; + lvds0_out: endpoint { + }; + }; + }; + }; + + lvds1: lvds@feb94000 { + compatible = "renesas,r8a7742-lvds"; + reg = <0 0xfeb94000 0 0x1c>; + clocks = <&cpg CPG_MOD 725>; + power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; + resets = <&cpg 725>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds1_in: endpoint { + remote-endpoint = <&du_out_lvds1>; + }; + }; + port@1 { + reg = <1>; + lvds1_out: endpoint { }; }; };