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[03/11] pinctrl: renesas: r8a779a0: Add DU pins, groups and function

Message ID 20201126172154.25625-4-uli+renesas@fpond.eu (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series pinctrl: renesas: R8A779A0 (V3U) device support | expand

Commit Message

Ulrich Hecht Nov. 26, 2020, 5:21 p.m. UTC
This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/pinctrl/renesas/pfc-r8a779a0.c | 64 ++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

Comments

Geert Uytterhoeven Nov. 27, 2020, 3:50 p.m. UTC | #1
Hi Uli,

On Thu, Nov 26, 2020 at 6:22 PM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC.
> Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> @@ -1736,6 +1736,53 @@ static const unsigned int canfd_clk_mux[] = {
>         CAN_CLK_MARK,
>  };
>
> +/* - DU --------------------------------------------------------------------- */
> +static const unsigned int du_rgb888_pins[] = {
> +       /* DU_DR[7:2], DU_DG[7:2], DU_DB[7:2] */
> +       RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
> +       RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
> +       RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 15),
> +       RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 12),
> +       RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
> +       RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
> +};
> +static const unsigned int du_rgb888_mux[] = {
> +       DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK,
> +       DU_DR4_MARK, DU_DR3_MARK, DU_DR2_MARK,
> +       DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK,
> +       DU_DG4_MARK, DU_DG3_MARK, DU_DG2_MARK,
> +       DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK,
> +       DU_DB4_MARK, DU_DB3_MARK, DU_DB2_MARK,
> +};
> +static const unsigned int du_clk_out_pins[] = {
> +       /* DU_DOTCLKOUT */
> +       RCAR_GP_PIN(1, 24),
> +};
> +static const unsigned int du_clk_out_mux[] = {
> +       DU_DOTCLKOUT_MARK,
> +};
> +static const unsigned int du_oddf_pins[] = {
> +       /* DU_EXODDF/DU_ODDF/DISP/CDE */
> +       RCAR_GP_PIN(1, 27),
> +};
> +static const unsigned int du_oddf_mux[] = {
> +       DU_ODDF_DISP_CDE_MARK,
> +};
> +static const unsigned int du_cde_pins[] = {
> +       /* DU_CDE */
> +       RCAR_GP_PIN(1, 27),
> +};
> +static const unsigned int du_cde_mux[] = {
> +       DU_ODDF_DISP_CDE_MARK,
> +};
> +static const unsigned int du_disp_pins[] = {
> +       /* DU_DISP */
> +       RCAR_GP_PIN(1, 27),
> +};
> +static const unsigned int du_disp_mux[] = {
> +       DU_ODDF_DISP_CDE_MARK,
> +};

With not-yet-submitted debug checks:

    r8a779a0_pfc: groups du_cde can be an alias for du_oddf
    r8a779a0_pfc: groups du_disp can be an alias for du_oddf
    r8a779a0_pfc: groups du_disp can be an alias for du_cde

Do we need all three?

> @@ -2103,6 +2156,15 @@ static const char * const canfd_clk_groups[] = {
>         "canfd_clk",
>  };
>
> +static const char * const du_groups[] = {
> +       "du_rgb888",
> +       "du_clk_out",
> +       "du_sync",

With CONFIG_DEBUG_PINCTRL=y:

    r8a779a0_pfc: function du: group du_sync not found

And indeed, the sync group with the HSYNC (GP1_25) and VSYNC (GP1_26)
pins is missing.

With the above fixed:

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 725d6b58bb4d..9b1f140372fd 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -1736,6 +1736,53 @@  static const unsigned int canfd_clk_mux[] = {
 	CAN_CLK_MARK,
 };
 
+/* - DU --------------------------------------------------------------------- */
+static const unsigned int du_rgb888_pins[] = {
+	/* DU_DR[7:2], DU_DG[7:2], DU_DB[7:2] */
+	RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
+	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 15),
+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 12),
+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
+};
+static const unsigned int du_rgb888_mux[] = {
+	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK,
+	DU_DR4_MARK, DU_DR3_MARK, DU_DR2_MARK,
+	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK,
+	DU_DG4_MARK, DU_DG3_MARK, DU_DG2_MARK,
+	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK,
+	DU_DB4_MARK, DU_DB3_MARK, DU_DB2_MARK,
+};
+static const unsigned int du_clk_out_pins[] = {
+	/* DU_DOTCLKOUT */
+	RCAR_GP_PIN(1, 24),
+};
+static const unsigned int du_clk_out_mux[] = {
+	DU_DOTCLKOUT_MARK,
+};
+static const unsigned int du_oddf_pins[] = {
+	/* DU_EXODDF/DU_ODDF/DISP/CDE */
+	RCAR_GP_PIN(1, 27),
+};
+static const unsigned int du_oddf_mux[] = {
+	DU_ODDF_DISP_CDE_MARK,
+};
+static const unsigned int du_cde_pins[] = {
+	/* DU_CDE */
+	RCAR_GP_PIN(1, 27),
+};
+static const unsigned int du_cde_mux[] = {
+	DU_ODDF_DISP_CDE_MARK,
+};
+static const unsigned int du_disp_pins[] = {
+	/* DU_DISP */
+	RCAR_GP_PIN(1, 27),
+};
+static const unsigned int du_disp_mux[] = {
+	DU_ODDF_DISP_CDE_MARK,
+};
+
 /* - I2C0 ------------------------------------------------------------------- */
 
 static const unsigned int i2c0_pins[] = {
@@ -1972,6 +2019,12 @@  static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(canfd7_data),
 	SH_PFC_PIN_GROUP(canfd_clk),
 
+	SH_PFC_PIN_GROUP(du_rgb888),
+	SH_PFC_PIN_GROUP(du_clk_out),
+	SH_PFC_PIN_GROUP(du_oddf),
+	SH_PFC_PIN_GROUP(du_cde),
+	SH_PFC_PIN_GROUP(du_disp),
+
 	SH_PFC_PIN_GROUP(i2c0),
 	SH_PFC_PIN_GROUP(i2c1),
 	SH_PFC_PIN_GROUP(i2c2),
@@ -2103,6 +2156,15 @@  static const char * const canfd_clk_groups[] = {
 	"canfd_clk",
 };
 
+static const char * const du_groups[] = {
+	"du_rgb888",
+	"du_clk_out",
+	"du_sync",
+	"du_oddf",
+	"du_cde",
+	"du_disp",
+};
+
 static const char * const i2c0_groups[] = {
 	"i2c0",
 };
@@ -2177,6 +2239,8 @@  static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(canfd7),
 	SH_PFC_FUNCTION(canfd_clk),
 
+	SH_PFC_FUNCTION(du),
+
 	SH_PFC_FUNCTION(i2c0),
 	SH_PFC_FUNCTION(i2c1),
 	SH_PFC_FUNCTION(i2c2),